Stress Relaxed Multiple Output High-Voltage Level Shifter

Rana, Vikas; Sinha, Rajeshwari

doi:10.1109/tcsii.2017.2685563

Cited by 15 publications

(4 citation statements)

References 14 publications

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“…14(b). To generate the control signal that swings between both 1 and 2 V DDH , stress relaxed multiple output high-voltage level shifter proposed in [30] is used. In the power stage, transistors M 3−4 , M 5−6 , and M 7−8 are stacked in each stage to reduce the stress of each thick-oxide transistor to not exceed 1 V DDH (unlike [31], which requires stress-tolerant diodes).…”

Section: On-chip Power Management Unitmentioning

confidence: 99%

An Ultrasound Imaging System With On-Chip Per-Voxel RX Beamfocusing for Real-Time Drone Applications

Guo

Jiang

et al. 2022

IEEE J. Solid-State Circuits

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For drone vision and navigation, low-power 1 3-D depth sensing with robust operations against strong/weak 2 light and various weather conditions is crucial. CMOS image 3 sensor (CIS) and light detection and ranging (LiDAR) can 4 provide high-fidelity imaging. However, CIS lacks depth 5 sensing and has difficulty in low light conditions. LiDAR is 6 expensive with issues of dealing with strong direct interference 7 sources. Ultrasound imaging system (UIS), on the other hand, 8 is robust in various weather and light conditions and is 9 cost-effective. However, in air channel, it often suffers from long 10 image reconstruction latency and low framerate. To address 11 these issues, we present a UIS application-specific integrated 12 circuit (ASIC) that adopts the one-shot transmitter (TX) and 13 on-chip per-voxel receiver (RX) beamfocusing (PV-RXBF) 14 image reconstruction scheme. The ASIC adopts the designs of 15 fully differential charge-reuse high-voltage TX (FDCR-HVTX), 16 digital back-end (DBE), and an on-chip power management unit 17 (PMU). FDCR-HVTX generates 28 V pp pulses and reduces the 18 average power consumption by 25% by charge reuse (CR). The 19 DBE achieves 7.76-µs processing latency and 9.83M-FocalPoint/s 20 throughput to effectively translate real-time 3-D image streaming 21 at 24 frames/s. A prototype UIS, with an 8 × 8 bulk piezo 22 transducer array, is assembled with the proposed ASIC and 23 a wireless data transmission module [field-programmable gate 24 array (FPGA) + ESP32] on an entry-level consumer drone, 25 and the real-time wireless 3-D image streaming at 24 frames/s 26 with a range of 7 m is verified while the drone is flying.

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Section: On-chip Power Management Unitmentioning

confidence: 99%

An Ultrasound Imaging System With On-Chip Per-Voxel RX Beamfocusing for Real-Time Drone Applications

Guo

Jiang

et al. 2022

IEEE J. Solid-State Circuits

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“…The driver circuit needs to provide the operating voltage of the CIM unit in the CIM array so that the CIM unit can complete the processes of writing, reading and erasing [14][15][16]. As shown in Figure 1, the CIM array driver circuit can be divided into two critical modules according to its function: high voltage control circuit and a charge pump [17]. According to the characteristics of floating gate devices, high voltage is required to switch the working mode, and the driver circuit is used to control the port potential of the CIM array to complete the memory and calculation of floating gate devices.…”

Section: Introductionmentioning

confidence: 99%

A Novel Word Line Driver Circuit for Compute-in-Memory Based on the Floating Gate Devices

Che

Dong

et al. 2023

Electronics

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In floating gate compute-in-memory (CIM) chips, due to the gate equivalent capacitance of the large-scale array and the parasitic capacitance of the long-distance transmission wire, it is difficult to balance the switching speed and area of the word line driver circuit (WLDC). The difference among multiple voltage domains required for floating gate CIM devices has also far exceeded the withstand voltage range of a single transistor in the WLDC. This paper proposes a novel WLDC based on the working principle of the CIM array. A multi-level pre-processing voltage control method is adopted to carry out an optional hierarchical transmission of multiple high voltages, significantly reducing the propagation delay. The proposed WLDC is based on the Wilson current mirror structure, which substantially reduces the physical design area. The simulation results show that the circuit can convert a 1.2 V low-voltage domain input signal with a frequency of 10 MHz into a high-voltage domain output voltage, and the output voltage range of a single WLDC can reach −10 V to 10 V. With a capacitive load within 5 pF, the transmission delay is less than 10 ns. The layout area is 594.88 µm2, which is suitable for a large-scale CIM array.

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“…Matsuzuka et al 11 use a pre-amplifier comprising a logic error correction circuit which can generating an operation current only when the logic levels of the input and output do not correspond. Literature [14][15][16][17][18][19] are presented on the basis of DCVS architecture. Lanuzza et al 14 combine the multi-threshold CMOS design technique along with novel topological strategies to achieve fast response and low energy consumption.…”

Section: Introductionmentioning

confidence: 99%

An energy‐efficient level shifter based on a differential cascade voltage switch structure

Zhang

Liu

et al. 2022

Circuit Theory & Apps

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Based on differential cascade voltage switch architecture, this paper proposes a level shifter with optimized energy consumption, constructed by stacking diode‐connected NMOS and PMOS transistors and splitting input signals of the two output stages. Eventually, the overlap time of input signals of the two output stages has been reduced, during which there is a considerable short‐current from high voltage source to ground. When implemented in a 110 nm CMOS process, post‐layout netlist simulations show that the proposed level shifter exhibits a 2.31 ns switching delay and 819 fJ energy consumption when converting a 1.5 V input signal into 4.5 V with 10 MHz operational frequency and 15 fF output load.

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Stress Relaxed Multiple Output High-Voltage Level Shifter

Cited by 15 publications

References 14 publications

An Ultrasound Imaging System With On-Chip Per-Voxel RX Beamfocusing for Real-Time Drone Applications

An Ultrasound Imaging System With On-Chip Per-Voxel RX Beamfocusing for Real-Time Drone Applications

A Novel Word Line Driver Circuit for Compute-in-Memory Based on the Floating Gate Devices

An energy‐efficient level shifter based on a differential cascade voltage switch structure

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