Study on the negative bias temperature instability effect under dynamic stress

Abstract

This paper studies negative bias temperature instability (NBTI) under alternant and alternating current (AC) stress. Under alternant stress, the degradation smaller than that of single negative stress is obtained. The smaller degradation is resulted from the recovery of positive stress. There are two reasons for the recovery. One is the passivation of H dangling bonds, and another is the detrapping of charges trapped in the oxide. Under different frequencies of AC stress, the parameters all show regular degradation, and also smaller than that of the direct current stress. The higher the frequency is, the smaller the degradation becomes. As the negative stress time is too small under higher frequency, the deeper defects are hard to be filled in. Therefore, the detrapping of oxide charges is easy to occur under positive bias and the degradation is smaller with higher frequency.

Analysis of recoverable and permanent components of threshold voltage shift in NBT stressed p-channel power VDMOSFET

“…[37] In some papers only a weak frequency dependence of NBT degradation in the range 100 Hz < f < 100 kHz is reported, [19,38] whereas the others show a monotonic decrease of stress-induced ∆V T with frequency decreasing. [39,40] In our case, the results shown in Fig. 2 suggest that ∆V T under the pulsed NBT stress conditions becomes more pronounced with frequency increasing.…”

Flat-roof phenomenon of dynamic equilibrium phase in the negative bias temperature instability effect on a power MOSFET

“…[1][2][3] For years, many attempts have been made to study the NBTI effect in terms of experiments, modeling, and mechanism with different MOS structures and measurement conditions. [4][5][6][7][8][9] The majority of those works are commonly conducted with nanometer scale devices. However, the NBTI could also be crucial for ultra-thick gate oxide devices such as the power metal-oxide-semiconductor field-effect transistor (MOSFET) as its operation condition of high current and high voltage favors the NBTI.…”

Effects of stress conditions on the generation of negative bias temperature instability-associated interface traps

“…As one of the most important reliability issues in modern CMOS technology, negative bias temperature instability (NBTI) manifests itself as the degradation of device parameters when subjected to a negative gate bias at high temperature. [1][2][3][4][5] The previous studies have shown that interface traps (N it ) and oxide traps (N ot ) are the reasons for the NBTI degradation, with N it dominating the degradation. [6][7][8] To investigate the buildup of N it and the relevant NBTI degradation, the reaction-diffusion (R-D) model, which interprets the power-law dependence of N it generation, has been employed in many studies.…”