Symbolic model checking for sequential circuit verification

Burch, Jerry R.; Clarke, Edmund M.; Long, David E.; McMillan, Kenneth L.; Dill, David L.

doi:10.1109/43.275352

Cited by 410 publications

(242 citation statements)

References 19 publications

(14 reference statements)

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“…A common bottleneck of model checking is the BDD size for the transition relation, which can be reduced by conjunctive or disjunctive partitioning [24]. The former can be used naturally for statecharts and we have modified SMV to partition the transition relation more effectively.…”

Section: Partitioning Transition Relationsmentioning

confidence: 99%

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Optimizing symbolic model checking for statecharts

Chan

Anderson

Beame

et al. 2001

IIEEE Trans. Software Eng.

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AbstractÐSymbolic model checking based on binary decision diagrams is a powerful formal verification technique for reactive systems. In this paper, we present various optimizations for improving the time and space efficiency of symbolic model checking for systems specified as statecharts. We used these techniques in our analyses of the models of a collision avoidance system and a faulttolerant electrical power distribution (EPD) system, both used on commercial aircraft. The techniques together reduce the time and space requirements by orders of magnitude, making feasible some analysis that was previously intractable. We also elaborate on the results of verifying the EPD model. The analysis disclosed subtle modeling and logical flaws not found by simulation.

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Section: Partitioning Transition Relationsmentioning

confidence: 99%

“…Recall that a predecessor computation involves a conjunction and an existential quantification. The two operations can be carried out simultaneously to avoid building the usually large conjunction explicitly [24]. SMV performs this optimization except when conjunctive partitioning is used.…”

Section: Tcas IImentioning

confidence: 99%

Optimizing symbolic model checking for statecharts

Chan

Anderson

Beame

et al. 2001

IIEEE Trans. Software Eng.

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“…Each di erent total token con guration must be assigned a unique minterm, i.e. 8C j C k 2 C Ii j 6 = k : E Ii (C j ) E Ii (C k ) = 0 : (5) For the invariants in (1) we h a ve to encode 8 di erent token con gurations, therefore dlog 2 (8)e = 3 v ariables are required for each i n variant. …”

Section: Token Con Gurations In Invariantsmentioning

confidence: 99%

“…In particular, PNs play an important role in the synthesis and veri cation of concurrent systems. PNs are applied, for example, to the synthesis and veri cation of digital asynchronous circuits, to model heterogeneous systems in hardware/software codesign frameworks, and to verify concurrent systems 5,19].…”

Section: Introductionmentioning

confidence: 99%

Structural Methods to Improve the Symbolic Analysis of Petri Nets

Pastor

Cortadella

Peña

1999

Lecture Notes in Computer Science

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Abstract. Symbolic techniques based on BDDs (Binary Decision Diagrams) have emerged as an e cient strategy for the analysis of Petri nets. The existing techniques for the symbolic encoding of each marking u s e a x e d s e t o f v ariables per place, leading to encoding schemes with very low density. This drawback has been previously mitigated by u s i n g Zero-Suppressed BDDs, that provide a typical reduction of BDD sizes by a factor of two. Structural Petri net theory provides P-invariants that help to derive more e cient encoding schemes for the BDD representations of markings. P-invariants also provide a mechanism to identify conservative upper bounds for the reachable markings. The unreachable markings determined by the upper bound can be used to alleviate both the calculation of the exact reachability set and the scrutiny of properties. Such approach allows to drastically decrease the numberofvariables for marking encoding and reduce memory and CPU requirements signi cantly.

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“…(C1) For no action 2 Actnample(s) that is dependent on some action in ample(s) there exists a path in T such that appears in before an action from ample(s) appears on . 10 push(h(s 0 )) (**) 11 expand-node(h(s 0 )) (**) 12 create-edge(s, ,h(s 0 )) (**) 13 14 end for all 15 end while 16 mark s as explored. 17 end expand-node The lemma given below will be used in our main theorem.…”

Section: Algorithm For Preserving Lt L-xmentioning

confidence: 99%

Symmetry and induction in model checking

Clarke

Jha

1995

Computer Science Today

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With the increasing complexity of digital systems, testing of digital systems is becoming increasingly important. Perhaps, the most popular method for testing hardware is simulation. The incompleteness of simulation based testing methods has spurred the recent surge in the research on formal veri cation. In formal veri cation, one builds a precise model of the hardware under scrutiny and proves that the model satis es a speci cation of interest. For example, suppose one wants to verify that a router chip does not deadlock. In this case the user will build a precise model of the router and the speci cation will express the property of deadlock freedom. The two approaches to formal veri cation are model checking and theorem proving. In this thesis we will only discuss model checking. Most model checking procedures su er from the state explosion problem, i.e., the size of the state space of the system can be exponential in the number of state variables of the system. For certain systems, exploiting the inherent symmetry can alleviate the state-explosion problem. We discuss Model Checking procedures which exploit symmetry. Current model checkers can only verify a single state-transition system at a time. We also want to extend the model checking techniques to handle in nite families of nite-state systems. In practice, nite state concurrent systems often exhibit considerable symmetry. W e i n v estigate techniques for reducing the complexity o f temporal logic model checking in the presence of symmetry. In particular, we show that symmetry can frequently be used to reduce the size of the state space that must be explored during model checking. We also investigate complexity o f v arious problems related to exploiting symmetry in model checking. Partial order based reduction techniques exploit independence of actions. We demonstrate that partial order and symmetry based reduction techniques can be applied simultaneously. The ability to reason automatically about entire families of similar state-transition systems is an important research goal. Such families arise frequently in the design of reactive systems in both hardware and software. The in nite family of token rings is a simple example. More complicated examples are trees of processes consisting of one root, several internal and leaf nodes, and hierarchical buses with di erent n umbers of processors and caches. A technique for verifying entire families of state-transition systems based on network grammars and process invariants is presented here.

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Symbolic model checking for sequential circuit verification

Abstract: Abstract-

Cited by 410 publications

References 19 publications

Optimizing symbolic model checking for statecharts

Optimizing symbolic model checking for statecharts

Structural Methods to Improve the Symbolic Analysis of Petri Nets

Symmetry and induction in model checking

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