The incorporation of timing makes circuit verification computationally expensive. This paper proposes a new approach for the verification of timed circuits. Rather than calculating the exact timed state space, a conservative overestimation that fulfills the property under verification is derived. Timing analysis with absolute delays is efficiently performed at the level of event structures and transformed into a set of relative timing constraints. With this approach, conventional symbolic techniques for reachability analysis can be efficiently combined with timing analysis. Moreover, the set of timing constraints used to prove the correctness of the circuit can also be reported for backannotation purposes. Some preliminary results obtained by a naive implementation of the approach show that systems with more than ½¼ untimed states can be verified. £ This work has been partially funded by a grant from Intel Corporation, ACiD-WG (ESPRIT 21949), and the Ministry of Education of Spain under contracts CICYTs TIC 98-0410 and TIC 98-0949.

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Abstract. Symbolic techniques based on BDDs (Binary Decision Diagrams) have emerged as an e cient strategy for the analysis of Petri nets. The existing techniques for the symbolic encoding of each marking u s e a x e d s e t o f v ariables per place, leading to encoding schemes with very low density. This drawback has been previously mitigated by u s i n g Zero-Suppressed BDDs, that provide a typical reduction of BDD sizes by a factor of two. Structural Petri net theory provides P-invariants that help to derive more e cient encoding schemes for the BDD representations of markings. P-invariants also provide a mechanism to identify conservative upper bounds for the reachable markings. The unreachable markings determined by the upper bound can be used to alleviate both the calculation of the exact reachability set and the scrutiny of properties. Such approach allows to drastically decrease the numberofvariables for marking encoding and reduce memory and CPU requirements signi cantly.

This paper introduces a novel

TX 75083-3836, U.S.A., fax 01-972-952-9435. AbstractThe performance prediction of a Rotary Gas Separator (RGS) is very important for ESP systems applications. The pump performance is severely affected when it handles high Gas Void Fraction (GVF) at its intake. The function of the RGS is to separate both liquid and gaseous phases, and to expel the gas through a crossover section to the annular area between casing and tubing. Typical designs use separation efficiency values based on an empirical standpoint of view. Also, the literature references regarding an important parameter like the inducer head is very scarce. The performance analysis of a RGS (540 series separator), under two-phase flow conditions, has been conducted using 3D-CFD simulation tools (CFX 5.6). Water-air mixtures were used as working fluid and the mixture GVF was varied from 10% up to 30%. The results shows that the RGS separates efficiently the phases, but the inducer head is insufficient to overcome the friction losses in the crossover and the liquid column static pressure in the annular space. As a consequence, a new inducer design is necessary to create a higher head value to push the gaseous phase out of the RGS and not to be dragged by the liquid phase. The simulation could be an alternative tool for selecting the depth of the downhole equipment as a function of the liquid level. This could help the designer to properly obtain the minimum submergence of the equipment that satisfy the phases separation and gas expulsion of the RGS, getting a lower GVF at the PIP.