“…All these parameter variations have been analyzed by performing analytical analysis supported by simulation work [31]. Generalized analytical models for HEMT [30,[32][33][34] have been used to obtain the analytical results for various metal-insulator geometries by considering different values of insulator thickness and permittivity in various regions of the device under consideration. Taking into account, the present lithographic scenario and controlled thermal reflow treatment [11] on multiresist process for fabrication, a gate geometry has been considered, which upon playing with the insulator thickness and dielectric constant of the material forming the gate-dielectric system can give an account of various metal-insulator geometries in which the effect of FP can be made possible either on source side (SFP), or drain side (DFP) or on both source and drain end (BFP).…”