Proceedings of the Lightwave Technologies in Instrumentation and Measurement Conference, 2004.
DOI: 10.1109/ltimc.2004.1371007
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Test setup for optical burst-mode receivers

Abstract: This paper proposes a test setup that can accurately measure the lock acquisition time of conventional and burst mode receivers subjected to phase, frequency, or amplitude steps. This work will be useful to network architects and circuit designers who wish to know with precision how many bits a receiver needs to acquire lock. The technique for measuring lock acquisition time, or preamble length, is based on an acceptable BER for the payload. Measurement results for the lock acquisition time of two commercially… Show more

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Cited by 3 publications
(3 citation statements)
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“…The trend and timescale of the CDR response are comparable to simulation results (Fig. 2), which verifies the accuracy of the PLL model proposed in [10]. It also confirms that a greater than ten-fold improvement in phase acquisition time has been achieved over that of a SONET CDR [10].…”
Section: Resultssupporting
confidence: 84%
See 1 more Smart Citation
“…The trend and timescale of the CDR response are comparable to simulation results (Fig. 2), which verifies the accuracy of the PLL model proposed in [10]. It also confirms that a greater than ten-fold improvement in phase acquisition time has been achieved over that of a SONET CDR [10].…”
Section: Resultssupporting
confidence: 84%
“…A narrow-band PLL's resistance to phase variations implies a slow acquisition time to steps in the incoming phase. The phase acquisition time of a commercially available SONET OC-48 CDR was previously measured at 1400 bits ( -rad phase steps) [10], which translates to microseconds at gigabit rates. In contrast to SONET networks, optical multiaccess networks are typically deployed in metropolitan areas where few or no repeaters are necessary.…”
Section: Broad-band Pll Cdrmentioning
confidence: 99%
“…These packets are usually short in a multiaccess network, what implies that this process must be done as fast as possible, within only a few bits [6]. Figure 2 illustrates an example of a two packet segment of the BMR incoming data, with a loud/soft transition.…”
Section: Bmr Circuit Design Challengesmentioning
confidence: 99%