The DRACON Embedded Many-Core: Hardware-Enhanced Run-Time Management Using a Network of Dedicated Control Nodes

Gregorek, Daniel; García-Ortiz, Alberto

doi:10.1109/isvlsi.2015.90

Cited by 3 publications

(5 citation statements)

References 21 publications

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“…DRACON is an experimental many-core architecture providing a dedicated infrastructure for hardware enhanced run-time management. This work extends our contributions presented in [22], [25] with respect to a systematic RTM taxonomy, the integration of distributed RTM hardware accelerators and a comprehensive evaluation of DRACON vs. state-of-the-art HW and SW solutions. Our architecture instantiates multiple distributed hardware modules dedicated to RTM functionality.…”

Section: Contributionsupporting

confidence: 59%

“…The DRACON approach facilitates a dedicated infrastructure for run-time management [22]. The overall RTM system constitutes a hardware enhanced and clustered RTM architecture.…”

Section: B Hardware Architecturementioning

confidence: 99%

“…Also, task queues and multiple context buffers can be integrated. The dedicated hardware HSLV can be implemented with low area overhead and operates in parallel to the core [22]. Any system-call from a user task is fetched by the HSLV and dispatched to its RTM master by means of a dedicated message.…”

Section: B: Hw-enhanced Rtm Slavementioning

confidence: 99%

“…Since the targeted applications potentially have a large number of parallel tasks, the DRACON RTM uses a recursive task fork/join strategy for application start-up [22]. Every recursive task spawns two additional system tasks and then blocks until its child's have terminated.…”

Section: ) Application Start-upmentioning

confidence: 99%

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DRACON: A Dedicated Hardware Infrastructure for Scalable Run-Time Management on Many-Core Systems

2019

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Many-core architectures integrate a large number of comparatively small processing cores into a single chip. However, the high degree of parallelism increases the run-time resource management complexity and overhead. The employment of dedicated hardware enhancements potentially enables a high quality of the resource management while management overhead is mitigated. To exploit the potential of hardware enhancements, we propose a dedicated infrastructure for run-time resource management on homogeneous MIMD many-core processors. For hardware enhanced resource management, a scalable and cluster-based system architecture is implemented. The resulting architecture (DRACON) utilizes message passing based communication, the dedicated infrastructure and hardware accelerators for resource management. A comprehensive evaluation for DRACON and reference architectures is performed using a transaction level simulation framework and dynamic task management as a use case. As benchmarks, synthetic models and task graph models of real-world applications are applied. The results reveal the limited scalability of classical architectures for resource management on many-cores. It is therefore necessary to apply cluster-based or moderately distributed architectures for many-core resource management. Further, the results demonstrate a significant performance improvement for the DRACON architecture at a number of hundreds of processing cores. Our evaluations show that DRACON generally outperforms software-only run-time management on many-core and achieves a performance improvement of up to 15.21% for single-program and more than 6% for mixed workloads.INDEX TERMS Computer architecture, many-core, dynamic run-time management, dedicated hardware.

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Section: Contributionsupporting

confidence: 59%

“…The DRACON approach facilitates a dedicated infrastructure for run-time management [22]. The overall RTM system constitutes a hardware enhanced and clustered RTM architecture.…”

Section: B Hardware Architecturementioning

confidence: 99%

Section: B: Hw-enhanced Rtm Slavementioning

confidence: 99%

Section: ) Application Start-upmentioning

confidence: 99%

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DRACON: A Dedicated Hardware Infrastructure for Scalable Run-Time Management on Many-Core Systems

2019

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“…Compared to the classical software approach of system management at the operating system level, hardwarededicated solutions present better results in fulfillment of the task deadlines [1] and improving predictability [13]. The drawback is a lower flexibility, which needs to be addressed with detailed simulations at design time.…”

Section: Introductionmentioning

confidence: 99%

A framework for hardware-based DVFS management in multicore mixed-criticality systems

Haririan

García-Ortiz

2015

2015 10th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)

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With a paradigm shift to the multicore era, the analysis of power management techniques has become crucial. Besides, allowing applications at different levels of criticality to run on the same platform introduces higher complexity to the power and performance analysis of System-on-Chips. This work presents a system-level simulation framework and an architectural template for power management in multicore mixed-criticality systems to cope with this problem. The framework provides an efficiently emulated dynamic voltage and frequency scaling (DVFS) through full-system simulation. The architectural template uses a hardware-dedicated power manager and a real-time monitoring mechanism for critical applications. The power manager is able to guarantee criticality requirements while showing significant reduction in power consumption in experimental evaluations.

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The Agamid design-space exploration framework

Gregorek

García-Ortiz

2018

Des Autom Embed Syst

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The DRACON Embedded Many-Core: Hardware-Enhanced Run-Time Management Using a Network of Dedicated Control Nodes

Cited by 3 publications

References 21 publications

DRACON: A Dedicated Hardware Infrastructure for Scalable Run-Time Management on Many-Core Systems

DRACON: A Dedicated Hardware Infrastructure for Scalable Run-Time Management on Many-Core Systems

A framework for hardware-based DVFS management in multicore mixed-criticality systems

The Agamid design-space exploration framework

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