Electromigratio n (EM) has b een cond ucted on lead -free solder balls in wafer-level packages for different redistribution layer (RDL) thicknesses, under bump metallurgy (UBM) schemes, and lead-free solder alloys. Two different types of EM-induced voids were observed at the electron-source side: pancake void between the solder/RDL interface and throughthickness voids in the RDL. In both cases, voids formed at the interface of CuSn intermetallic compound and solder. A Nilayer in the UBM was found to prolong EM lifetime by slowing the diffusion of Sn into the Cu RDL relative to a Cuonly UBM. The absence of UBM led to the shortest EM lifetime due to direct contact of solder to RDL. Also, a thicker RDL extended lifetime proportionately to the decrease in current density and Joule heating at the critical interface. On the other hand, adding Ni and Ge to the SAC alloy did not statistically impact lifetime.
IntroductionWafer-level packaging (WLP) achieves a small-form factor and lower cost by eliminating the package substrate, and connecting the die directly to the printed circuit board (PCB) via solder balls.When materials, geometries, and/or structures change, the entire system needs to be re-characterized for board level reliability. These changes can include redistribution layer (RDL) material and thickness, underbump metallurgy (UBM) material and thickness, and solder ball metallurgy. This paper describes the impact of such changes on electromigration. Related papers investigate other aspects of board level reliability including drop shock and temperature cycle [1][2]. Fundamentally, EM is the self-diffusion of metal(s) induced by electric current, which can lead to voiding and interconnect failure, and is an area of major reliability concern for interconnects. Electromigration lifetime quickly degrades with increasing temperature and current density, as described by the well-known Black's Law established in 1969 [3]: