International Electron Devices Meeting 1991 [Technical Digest]
DOI: 10.1109/iedm.1991.235338
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The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors

Abstract: In this paper an experimental study of hot carrier degradation and power supply voltage scaling of deep submicron NMOS devices will be presented. Devices were optimized for processes with design rule between 2 pm and 0.17 pm. Charge pumping measurements showed that the lifetime based on interface state generation in the devices was determined only by Ig&/Id and the drain current. It did not depend on gate length, oxide thickness and substrate doping. The lifetime (g,-shifts) of the devices with minimum gate le… Show more

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Cited by 4 publications
(1 citation statement)
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“…As with the continuous downscaling of device dimensions, variations in transistor parameters are increasing drastically and lead to unexpected reliability issues [6,7]. These issues are essentially classified to -Time-zero‖ variability issues [8] such as Line-Edge Roughness (LER), Random Dopant Fluctuations (RDFs), Metal Gate Granularity and Body Thickness Variation, that causes intra-die variations during manufacturing process, and -Time-dependent‖ variability issues that are considered to be a major source for performance degradation of scaled devices over their lifetime, such as Negative Bias Temperature Instability (NBTI) [9], Hot Carrier Injection (HCI) [10], and Time-Dependent Dielectric Breakdown (TDDB) [11] Electro-migration, Self-heating and Body Effects, these degradation mechanisms are caused by the formation of charged traps within the gate oxide layer due to the high electric field and temperature that lead to a change in the device parameters (e.g. threshold voltage, carrier mobility, drain current) over time , depending on the operating conditions and the workload over lifetime.…”
Section: Reliability Issues In Deep Sub-micron Technologiesmentioning
confidence: 99%
“…As with the continuous downscaling of device dimensions, variations in transistor parameters are increasing drastically and lead to unexpected reliability issues [6,7]. These issues are essentially classified to -Time-zero‖ variability issues [8] such as Line-Edge Roughness (LER), Random Dopant Fluctuations (RDFs), Metal Gate Granularity and Body Thickness Variation, that causes intra-die variations during manufacturing process, and -Time-dependent‖ variability issues that are considered to be a major source for performance degradation of scaled devices over their lifetime, such as Negative Bias Temperature Instability (NBTI) [9], Hot Carrier Injection (HCI) [10], and Time-Dependent Dielectric Breakdown (TDDB) [11] Electro-migration, Self-heating and Body Effects, these degradation mechanisms are caused by the formation of charged traps within the gate oxide layer due to the high electric field and temperature that lead to a change in the device parameters (e.g. threshold voltage, carrier mobility, drain current) over time , depending on the operating conditions and the workload over lifetime.…”
Section: Reliability Issues In Deep Sub-micron Technologiesmentioning
confidence: 99%