Thermal Management in a 3D-PCB-Package with Water Cooling

Abstract

The 3D-packaging technology makes it possible to stack the PCBs on top of each other and thus make full use of the third dimension. A unique space between the stacked PCB layers enables a reproducible technology without shortcuts or unconnected bumps. New applications in 3D-PDB-packages, called PCBMEMS can be realized with the combination of electric bumps and solder rings. The paper shows an fluidic cooled 11-PCB-layer with high power components. Water channels in the PCB-package dissipate the heat from the inside of the package to the environment. Heat dissipation is a bigger challenge for stacks of 3D-packages than for normal printed circuit boards (PCBs). This research paper investigates some design suggestions for a better heat dissipation. On the basis of this research paper, it becomes possible to choose the best suited PCB design. The experimental results were compared to thermal simulation results. The results of the measurements and FEM simulations show, how important it is to combine the electrical and geometrical functions of 3D packages with a thermally optimized PCB design. A better heat spreading and conduction in a 3D package makes the stack more reliable at higher power dissipation.

Experimental analysis model of an active cooling method for 3D-ICs utilizing a multidimensional configured thermoelectric

“…[3] One other potential problems with sub-ambient cooling 3D-ICs is a slim probability of packaging small sub-ambient cooling device or system in a tight real estate available on the motherboard as shown in Figure 5 below: The higher the processor power, the larger the thermoelectric module must be, which leads to larger heatsink footprint requirement. The growth in heat sink size will shadow other area on the motherboard such as RAMs space and external peripheral I/O connections.…”

“…al. [3], clearly packaging such system is complex and costly; also water leakage in this type of system might potentially be a big problem in an electrical sensitive environment.…”

Electrical and fluidic C4 interconnections for inter-layer liquid cooling of 3D ICs

“…Solder ring based fluidic sealing approaches have been studied to form compact 3D packages by stacking multi-layer FR-4 substrates in [10,11]. Using a solder-based fluidic seal provides an alternative hermetic sealing approach to the polymer-based sealing approach discussed in [7].…”

Experimental and Numerical Investigation of Interdie Thermal Resistance in Three-Dimensional Integrated Circuits

“…Even though 3D IC technology results in reduced interconnect length, removing heat from such architectures has proven to be difficult. Different liquid-and solid-state cooling systems have been explored to reduce hot spot and junction temperature [9][10][11]. Several studies on the effect of copper-filled through silicon vias (TSVs) for electrical connection, as well as thermal dissipation, in 3D-stacked chips have been performed numerically and experimentally [12][13][14][15].…”