Thermal modeling and design of 3D integrated circuits

Jain, Ankur; Jones, Robert E.; Chatterjee, Ritwik; Pozder, Scott; Huang, Zhihong

doi:10.1109/itherm.2008.4544389

Cited by 55 publications

(28 citation statements)

References 10 publications

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“…Thermal through silicon vias (TTSVs) [6] are a very promising principle. TTSVs are based on the principle that it is more desirable to reduce the difference in the temperatures between various parts of the IC, rather than the reduction of the absolute temperature of the chip.…”

Section: Tsvs Thermal Characterization and Experimental Balancingmentioning

confidence: 99%

Through Silicon Via-based Grid for Thermal Control in 3D Chips

Ayala¹,

Sridhar²,

Pangracious³

et al. 2012

Design Technology for Heterogeneous Embedded Systems

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Abstract. 3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between processing cores, and an effective way to diminish this impact on communication is the 3D integration technology and the use of through-silicon vias (TSVs) for inter-layer communication. However, 3D chips present important ther-mal issues due to the presence of processing units with a high power density, which are not homogeneously distributed in the stack. Also, the presence of hot-spots creates thermal gradients that impact negatively on the system reliability and relate with the leakage power consumption. Thus, new approaches for thermal control of 3D chips are in great need. This paper discusses the use of a grid and non-uniform placement of TSVs as an effective mechanism for thermal balancing and control in 3D chips. We have modelled the material layers and TSVs mathematically using a detailed calibration phase based on a real 5-tier 3D chip stack, where several heaters and sensors are manufactured to study the heat diffusion. The obtained results show interesting conclusions about thermal dissipation for 3D chips with TSVs and outline new insights in the area of thermal modeling and optimization for 3D chips by exploiting the inclusion of minimal percentages of TSVs in strategic positions of the layout.

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Section: Tsvs Thermal Characterization and Experimental Balancingmentioning

confidence: 99%

Through Silicon Via-based Grid for Thermal Control in 3D Chips

Ayala¹,

Sridhar²,

Pangracious³

et al. 2012

Design Technology for Heterogeneous Embedded Systems

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show abstract

“…Several works have analyzed the optimization of placement of TSVs for heat dissipation in 3D ICs [31,32]. Other works [33] propose analytical and finiteelement models of heat transfer in 3D electronic circuits and use this model to analyze the impact of various geometric parameters and thermo-physical properties (through silicon vias, inter-die bonding layers, etc.) on thermal performance of a 3D IC, but at the cost of very time-consuming simulations.…”

Section: Related Workmentioning

confidence: 99%

Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling

Valle

Atienza

2011

Microelectronics Journal

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Abstract-New tendencies envisage 2D/3D Multi-Processor System-On-Chip (MPSoC) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute multiple applications (games, video), while meeting additional design constraints (energy consumption, time-to-market, etc.). Moreover, the rise of temperature in the die for MPSoCs, especially for forthcoming 3D chips, can seriously affect their final performance and reliability. In this context, transient thermal modeling is a key challenge to study the accelerated thermal problems of MPSoC designs, as well as to validate the benefits of active cooling techniques (e.g., liquid cooling), combined with other state-of-the-art methods (e.g., dynamic frequency and voltage scaling), as a solution to overcome run-time thermal runaway.In this paper, I present a novel approach for fast transient thermal modeling and analysis of 2D/3D MPSoCs with active cooling, which relies on the exploitation of combined hardwaresoftware emulation and linear thermal models for liquid flow. The proposed framework uses FPGA emulation as the key element to model the hardware components of 2D/3D MPSoC platforms at multi-megahertz speeds, while running real-life software multimedia applications. This framework automatically extracts detailed system statistics that are used as input to a scalable software thermal library, using different ordinary differential equation solvers, running in a host computer. This library calculates at run-time the temperature of on-chip components, based on the collected statistics from the emulated system and the final floorplan of the 2D/3D MPSoC. This approach creates a close-loop thermal emulation system that allows MPSoC designers to validate different hardware-and software-based thermal management approaches, including liquid cooling injection control, under transient and dynamic thermal maps. The experimental results with 2D/3D MPSoCs illustrate speed-ups of more than three orders of magnitude compared to cycle-accurate MPSoC thermal simulators, at the same time as preserving the accuracy of the estimated temperature within 3% of traditional approaches using finite-element simulations for 3D stacks and liquid cooling.

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“…Some work has been reported on optimizing the problem of placement of vias for heat dissipation in 3D ICs [22,25]. Other works [26] propose analytical and finite-element models of heat transfer in 3D electronic circuits and use this model to analyze the impact of various geometric parameters and thermophysical properties (through silicon vias, inter-die bonding layers, etc.) on thermal performance of a 3D IC.…”

Section: Related Workmentioning

confidence: 99%