Thwarting Replication Attack Against Memristor-Based Neuromorphic Computing System

Yang, Chaofei; Liu, Beiye; Li, Hai; Chen, Yiran; Barnell, Mark; Wu, Qing; Wen, Wujie; Rajendran, Jeyavijayan

doi:10.1109/tcad.2019.2937817

Cited by 17 publications

(14 citation statements)

References 30 publications

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“…To thwart this kind of attack, Yang et al (2020) proposed to leverage the obsolescence effect of memristor devices to reduce the inference accuracy of the computing systems for unauthorized users. The obsolescence effect of memristor devices causes them to be in the HRS or LRS as a result of read voltage pulses across them.…”

Section: Thwarting Learning Attacksmentioning

confidence: 99%

Review of security techniques for memristor computing systems

Zou¹,

Du²,

Kvatinsky³

2022

Front. Electron. Mater

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Neural network (NN) algorithms have become the dominant tool in visual object recognition, natural language processing, and robotics. To enhance the computational efficiency of these algorithms, in comparison to the traditional von Neuman computing architectures, researchers have been focusing on memristor computing systems. A major drawback when using memristor computing systems today is that, in the artificial intelligence (AI) era, well-trained NN models are intellectual property and, when loaded in the memristor computing systems, face theft threats, especially when running in edge devices. An adversary may steal the well-trained NN models through advanced attacks such as learning attacks and side-channel analysis. In this paper, we review different security techniques for protecting memristor computing systems. Two threat models are described based on their assumptions regarding the adversary’s capabilities: a black-box (BB) model and a white-box (WB) model. We categorize the existing security techniques into five classes in the context of these threat models: thwarting learning attacks (BB), thwarting side-channel attacks (BB), NN model encryption (WB), NN weight transformation (WB), and fingerprint embedding (WB). We also present a cross-comparison of the limitations of the security techniques. This paper could serve as an aid when designing secure memristor computing systems.

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Section: Thwarting Learning Attacksmentioning

confidence: 99%

Review of security techniques for memristor computing systems

Zou¹,

Du²,

Kvatinsky³

2022

Front. Electron. Mater

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“…Neuromorphic learning systems based upon memristors are susceptible to learning-based attacks due to the memristors state-based response and various studies focused over this issue. Yang et al [112] presented a model to prevent an attacker from learning the behavior of the memristor-based neuromorphic architecture. The proposed strategy employs the memristor obsolescence effect for users where only legitimate users get complete access to the network.…”

Section: Learning-based Attack Preventionmentioning

confidence: 99%

“…Traditional neuromorphic architectures [103] Synaptic properties [101-102] Neuromorphic architecture design [104] Cognitive architecture design [105] Memristors for neuromorphic chips [116] Anomaly detection [113] Crossbar neuromorphic architecture [78] Hybrid neuromorphic architectures [107] Novel memristors for neurormophic arch. [115] Learning based attack prevention [112] Neuromorphic memristor modeling [111] Secure crossbar architecture [79] TCAM as coprocessor [61] Complex pattern recognition [58] Energy efficient hierarchical TCAM [41] Hierarchical routing table [42] Two-tier prefix matching [43] SRAM-based architecture [55] Multi-pipeline partitioning architecture [44][45] Memory management [47] Optimal routing prefix [48] IP range breakdown [51] Distributed TCAM architecture [46] Prefix address partitioning [52] Routing table partitioning [53] Range expansion using rule compaction [54] Bit vector protocol [56][57] Bloom filter query [59][60]…”

Section: Memristive Neuromorphic Computingmentioning

confidence: 99%

On Memristors for Enabling Energy Efficient and Enhanced Cognitive Network Functions

Saleh

Koldehofe

2022

IEEE Access

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The high performance requirements of nowadays computer networks are limiting their ability to support important requirements of the future. Two important properties essential in assuring cost-efficient computer networks and supporting new challenging network scenarios are operating energy efficient and supporting cognitive computational models. These requirements are hard to fulfill without challenging the current architecture behind network packet processing elements such as routers and switches. Notably, these are currently dominated by the use of traditional transistor-based components. In this article, we contribute with an in-depth analysis of alternative architectural design decisions to improve the energy footprint and computational capabilities of future network packet processors by shifting from transistor-based components to a novel component named Memristor. A memristor is a computational component characterized by non-volatile operations on a physical state, mostly represented in form of (electrical) resistance. Its state can be read or altered by input signals, e.g. electrical pulses, where the future state always depends on the past state. Unlike in traditional von Neumann architectures, the principles behind memristors impose that memory operations and computations are inherently colocated. In combination with the non-volatility, this allows to build memristors at nanoscale size and significantly reduce the energy consumption. At the same time, memristors appear to be highly suitable to model cognitive functionality due to the state dependence transitions in the memristor. In cognitive architectures, our survey contributes to the study of memristorbased Ternary Content Addressable Memory (TCAM) used for storage of cognitive rules inside packet processors. Moreover, we analyze the memristor-based novel cognitive computational architectures built upon self-learning capabilities by harnessing from non-volatility and state-based response of memristors (including reconfigurable architectures, reservoir computation architectures, neural network architectures and neuromorphic computing architectures).

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“…These techniques defend the NN architecture at the hardwarelevel. In [19], researchers have demonstrated a technique that defends memristor-based NN architectures by leveraging the memristor's obsolescence effect. The continuous application of voltage causes an increase in memristance, which causes the obsolescence effect in memristors.…”

Section: A Hardware Security Of Neural Networkmentioning

confidence: 99%

“…Later, in [20], researchers proposed a superparamagnetic magnetic tunnel junction (s-MTJs)-based defense mechanism that leverages the thermally-induced telegraphic switching property of s-MTJs to corrupt the weights. This defense is unlike [19], wherein the attacker cannot control the corruption of weights. However, the small retention time of s-MTJs warrants frequent refresh operations, leading to higher energy costs.…”

Section: A Hardware Security Of Neural Networkmentioning

confidence: 99%

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

Mankali

Rangarajan

Chatterjee

et al. 2022

IEEE J. Explor. Solid-State Comput. Devices Circuits

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With the emergence of the Internet of Things (IoT), deep neural networks (DNNs) are widely used in different domains, such as computer vision, healthcare, social media, and defense. The hardware-level architecture of a DNN can be built using an in-memory computing-based design, which is loaded with the weights of a well-trained DNN model. However, such hardware-based DNN systems are vulnerable to model stealing attacks where an attacker reverse-engineers and extracts the weights of the DNN model. In this work, we propose an energy-efficient defense technique that combines a Ferroelectric Field Effect Transistor (FeFET)-based reconfigurable physically unclonable function (PUF) with an in-memory FeFET XNOR to thwart model stealing attacks. We leverage the inherent stochasticity in the FE domains to build a PUF that helps to corrupt the neural network's weights when an adversarial attack is detected. We showcase the efficacy of the proposed defense scheme by performing experiments on graph-neural networks (GNNs), a particular type of DNN. The proposed defense scheme is a first of its kind that evaluates the security of GNNs. We investigate the effect of corrupting the weights on different layers of the GNN on the accuracy degradation of the graph classification application for two specific error models of corrupting the FeFET-based PUFs and five different bioinformatics datasets. We demonstrate that our approach successfully degrades the inference accuracy of the graph classification by corrupting any layer of the GNN after a small re-write pulse.

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Thwarting Replication Attack Against Memristor-Based Neuromorphic Computing System

Cited by 17 publications

References 30 publications

Review of security techniques for memristor computing systems

Review of security techniques for memristor computing systems

On Memristors for Enabling Energy Efficient and Enhanced Cognitive Network Functions

Leveraging Ferroelectric Stochasticity and In-Memory Computing for DNN IP Obfuscation

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