Tri-Gate Ferroelectric FET Characterization and Modelling for Online Training of Neural Networks at Room Temperature and 233K

De, Sourav; Baig, Md. Aftab; Qiu, Bo-Han; Lu, Darsen D.; Sung, Po-Jung; Hsueh, Fu Kuo; Lee, Yao-Jen; Su, Chun-Jung

doi:10.1109/drc50226.2020.9135186

Cited by 16 publications

(20 citation statements)

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“…This is typical for scaled devices which is more succeptible to short channel effects. This trait has already been reported in several publications [10,26]. Fig.…”

Section: Characterizationsupporting

confidence: 78%

Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications

Baig

Qiu

et al. 2022

Front. Nanotechnol.

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This work presents 2-bits/cell operation in deeply scaled ferroelectric finFETs (Fe-finFET) with a 1 µs write pulse of maximum ±5 V amplitude and WRITE endurance above 109 cycles. Fe-finFET devices with single and multiple fins have been fabricated on an SOI wafer using a gate first process, with gate lengths down to 70 nm and fin width 20 nm. Extrapolated retention above 10 years also ensures stable inference operation for 10 years without any need for re-training. Statistical modeling of device-to-device and cycle-to-cycle variation is performed based on measured data and applied to neural network simulations using the CIMulator software platform. Stochastic device-to-device variation is mainly compensated during online training and has virtually no impact on training accuracy. On the other hand, stochastic cycle-to-cycle threshold voltage variation up to 400 mV can be tolerated for MNIST handwritten digits recognition. A substantial inference accuracy drop with systematic retention degradation was observed in analog neural networks. However, quaternary neural networks (QNNs) and binary neural networks (BNNs) with Fe-finFETs as synaptic devices demonstrated excellent immunity toward the cumulative impact of stochastic and systematic variations.

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“…This is typical for scaled devices which is more succeptible to short channel effects. This trait has already been reported in several publications [10,26]. Fig.…”

Section: Characterizationsupporting

confidence: 78%

Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications

Baig

Qiu

et al. 2022

Front. Nanotechnol.

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“…Therefore, we focus on the inference-only operation and monolithic-3D integration of ferroelectric memories. Finally, the system level validation of the monolithic-3D (M3D) inference engine was performed using the simulation platform described in [35,[83][84][85][86][87]. The modus operandi for IGZO based FeTFT M3D inference engine are described in Fig.…”

Section: Applications In Neural Networkmentioning

confidence: 99%

Monolithic-3D Inference Engine with IGZO Based Ferroelectric Thin Film Transistor Synapses

De¹,

Lederer²,

Raffel³

et al. 2023

Preprint

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<p> Instigated by the plethora of data generated by edge devices and IoT devices, machine learning has become the de facto choice of everyone for solving many tasks. Applications such as intelligent healthcare monitoring systems, smart watches, or automatic cars require real-time processing of the data or image, which is done by machine learning algorithms with higher efficiency than humans. There are two possible methods for artificial intelligence?1. non-von-Neumann hardware-based implementation of neural networks 2. traditional computer science based approach for neural networks or traditional von-Neumann architecture?based implementation of neural networks The standard von-Neumann performance of neural networks, where the memory and computation parts are segregated, suffers from severe latency with increasing number of edge devices. However, the multitude of edge devices used in our daily life imposes strict restrictions on latency, device area, and power consumption for hardware. Therefore, we need to take the route beyond the CMOS-based mixed-signal implementation of neural networks, where the memory bandwidth is not limited by the quintessential von-Neumann archi?tecture. The primary motivation of present-day research on the non-von-Neumann computing architecture is to build dedicated hardware modules for implementing low-power, fast-computing units without affecting the recent trend of scaling. This chapter focuses on amorphous indium-gallium-zinc-oxide (α-IGZO) based and their system-level applications. Back-end-of-line (BEoL) compatible indium IGZO based multibit one-time programmable (OTP) ferroelectric thin film transistors (FeTFT) with lifelong retention capability were fabricated. The maximum temperature of the entire fabrication process was limited to 350oC. The gate-stack engineering by varying the thickness ratio of ferroelectric hafnium zirconium oxide (HZO) and IGZO layer fomented excellent data-retention capability and one time programming property. Further, we have evaluated the performance of IGZO-based FeTFT as synaptic devices for an inference engine. The system-level simulation revealed inference accuracy loss of only 1.5% after ten years without re-training for Modified National Institute of Standards and Technology (MNIST) hand-written digits in a multi-layer perceptron (MLP) neural network with a baseline of 97%. The proposed inference engine also showed superior energy efficiency and cell area of 95.33 TOPS/W (binary) and 8F2 , respectively. </p>

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“…17−21 Despite the adoption of these stabilization techniques, atomic-layer-deposited (ALD) ferroelectric HfO 2 films exhibit nonuniform crystal properties, which can be observed variations in the distribution of forward and reverse threshold voltages (Figure 1) of FE-FinFETs (extracted at constant current of 200 nA) fabricated in one of our previous works. 12 We conjecture that the random distribution of ferroelectric and dielectric domains affects the coercive voltage of a ferroelectric capacitor, which inevitably affects the forward and reverse threshold voltages of FE-FET devices, leading to variations in program and erase voltages. For reliable ferroelectric memory or computation applications, the mitigation of these variations is of paramount importance.…”

Section: ■ Introductionmentioning

confidence: 97%

“…Recent progresses in CMOS-compatible and deeply scalable hafnium oxide(HfO 2 )-based ferroelectric FETs (FE-FET) have manifested their potential for being used as steep slope devices, low power electronics, and memory and in neuromorphic applications. , Amidst many advantages like low latency, CMOS compatibility, and high endurance, − the system level application of deeply scaled FE-FETs gets hindered by the device-to-device variations infused by erratic distribution of ferroelectric and dielectric phases in hafnium oxide (HfO 2 ). Ferroelectricity is dependent on the crystal structure, originating from the polarization catastrophe, − which results from the instability of the crystal structure.…”

Section: Introductionmentioning

confidence: 99%

“…The noncentrosymmetric Pca 21 orthorhombic phase of HfO 2 is responsible for ferroelectricity in the material. Typically, HfO 2 doped with silicon (Si), aluminum (Al), gadolinium (Gd), or Zirconium (Zr) and subjected to high-temperature annealing under various conditions to stabilize the ferroelectric orthorhombic phase. − Despite the adoption of these stabilization techniques, atomic-layer-deposited (ALD) ferroelectric HfO 2 films exhibit nonuniform crystal properties, which can be observed variations in the distribution of forward and reverse threshold voltages (Figure ) of FE-FinFETs (extracted at constant current of 200 nA) fabricated in one of our previous works . We conjecture that the random distribution of ferroelectric and dielectric domains affects the coercive voltage of a ferroelectric capacitor, which inevitably affects the forward and reverse threshold voltages of FE-FET devices, leading to variations in program and erase voltages …”

Section: Introductionmentioning

confidence: 99%

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Uniform Crystal Formation and Electrical Variability Reduction in Hafnium-Oxide-Based Ferroelectric Memory by Thermal Engineering

Qiu

et al. 2021

ACS Appl. Electron. Mater.

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In this paper, we achieved excellent variation control, endurance enhancement, and leakage reduction in zirconium (Zr)-doped hafnium oxide (Hf 1−x Zr x O 2 ) based ferroelectric films by the germination of large ferroelectric grains through extending the duration of rapid thermal annealing without increasing the temperature beyond 700 °C. The pivotal point of this work is to reduce electrical variations in ferroelectric capacitors, which we attribute to the random variation in ferroelectric and dielectric phases. The motivation for this research originally stemmed from Johnson− Mehl−Avrami−Kolmogorov's theory of nucleation, which predicts that a sufficient time is required for forming any particular phase during phase transformation. Instead of increasing the temperature beyond 700 °C, extending the duration of rapid thermal annealing allows uniform crystal to form, which agrees with the theory. A 10 nm thick Hf 1−x Zr x O 2 film (x = 0.2) has been fabricated. The duration and temperature of rapid thermal annealing (RTA) under a nitrogen (N 2 ) atmosphere at 1 atmospheric pressure (atm) is varied to observe its effect on crystal formation and the electrical properties of the devices. It was observed that very low temperature and short (30 s) duration annealing at 1 atm pressure cannot infuse ferroelectricity in Hf 1−x Zr x O 2 . Structural analysis clearly showed the formation of large and uniform ferroelectric domains with negligible impact on surface roughness upon extending the annealing duration up to 180 s. The device-to-device variation in terms of standard deviation of coercive voltage and peak capacitance are reduced from 400 to 17 mV and from 20 to 4 fF/cm 2 , respectively, by increasing the RTA duration at 700 °C. The devices have also displayed endurance above 1 million cycles and leakage current density below 10 pA/μm 2 . The simple physics-based process discussed here reduces the thermal budget required for Hf 1−x Zr x O 2 , mitigates the randomness in the domain distribution, and infuses deterministic switching. This improvement paves the way for implementing Hf 1−x Zr x O 2 -based, deeply scaled ferroelectric devices for memory and steep slope device applications.

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Tri-Gate Ferroelectric FET Characterization and Modelling for Online Training of Neural Networks at Room Temperature and 233K

Cited by 16 publications

References 0 publications

Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications

Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications

Monolithic-3D Inference Engine with IGZO Based Ferroelectric Thin Film Transistor Synapses

Uniform Crystal Formation and Electrical Variability Reduction in Hafnium-Oxide-Based Ferroelectric Memory by Thermal Engineering

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