Ultra-high speed Direct Tunneling Memory (DTM) for embedded RAM applications

Tsunoda, Koji; Sato, Akira; Tashiro, Hiroko; Ohira, Kentaro; Nakanishi, Takafumi; Tanaka, H.; Arimoto, Yoshihiro

doi:10.1109/vlsit.2004.1345447

Cited by 5 publications

(2 citation statements)

References 1 publication

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“…8. 2) If the retention time is defined as ÁI on ¼ 30 mA/mm, DTM with a FG dosage of 2 Â 10 14 cm À2 has a long retention time of 10 s, which is better than that of DTM with the FG dosage of 2 Â 10 15 cm À2 by 3 to 4 orders of magnitude. Our simulation results agree well with experimental results of the dependence of retention time on gate depletion.…”

Section: Retention Characteristicsmentioning

confidence: 99%

Device Design of Direct Tunneling Memory (DTM) Using Technology Computer Aided Design (TCAD) for Low-Power RAM Applications

Tashiro¹,

Tsunoda²,

Sato³

et al. 2005

Jpn. J. Appl. Phys.

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This paper proposed an X-band 6-bit passive phase shifter (PS) designed in 0.18 m silicon-on-insulator (SOI) CMOS technology, which solves the key problem of high integration degree, low power, and a small size T/R module. The switched-topology is employed to achieve broadband and flat phase shift. The ESD circuit and driver are also integrated in the PS. It covers the frequency band from 7.5 to 10.5 GHz with an EMS phase error less than 7.5 ı . The input and output VSWRs are less than 2 and the insertion loss (IL) is between 8-14 dB across the 7.5 to 10.5 GHz, with a maximum IL difference of 4 dB. The input 1 dB compression point (IP 1dB / is 20 dBm.

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Section: Retention Characteristicsmentioning

confidence: 99%

Device Design of Direct Tunneling Memory (DTM) Using Technology Computer Aided Design (TCAD) for Low-Power RAM Applications

Tashiro¹,

Tsunoda²,

Sato³

et al. 2005

Jpn. J. Appl. Phys.

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“…Floating gate (FG) metal-oxide-semicondutor (MOS) structures with ultra-thin SiO 2 tunnel dielectric 1) have potential for embedded-random-access memory (e-RAM) applications. In this work, we propose the use of mediummaterials (which we consider hereinafter as having a dielectric constant in a range from about 4 to about 12) as tunnel dielectrics in a FG direct tunneling (DT) memory device for e-RAM applications.…”

Section: Introductionmentioning

confidence: 99%

Performance of Direct Tunneling Floating Gate Memory with Medium-κ Dielectrics for Embedded-Random-Access Memory Applications

Govoreanu

Degraeve

Kauerauf

et al. 2006

jjap

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We propose the use of medium-κ dielectrics for direct tunneling floating gate memory devices, targeting embedded-random-access memory (e-RAM) applications. We found that SiON offers best performance if voltage reduction overrules refresh time, while Hf-silicates would be preferred if the refresh time is more critical. Our analysis is based on a direct tunneling current model, a response surface methodology and experimental data on small metal–oxide–semiconductor field-effect transistors (MOSFET's). The impact of dielectric degradation during cycling is studied for scalability towards the 32 nm node.

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High-Speed 3D Memories Enabling the AI Future

Or-Bach¹

2020

The Frontiers Collection

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Ultra-high speed Direct Tunneling Memory (DTM) for embedded RAM applications

Cited by 5 publications

References 1 publication

Device Design of Direct Tunneling Memory (DTM) Using Technology Computer Aided Design (TCAD) for Low-Power RAM Applications

Device Design of Direct Tunneling Memory (DTM) Using Technology Computer Aided Design (TCAD) for Low-Power RAM Applications

Performance of Direct Tunneling Floating Gate Memory with Medium-κ Dielectrics for Embedded-Random-Access Memory Applications

High-Speed 3D Memories Enabling the AI Future

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