Ultra low power supply voltage (0.3 V) operation with extreme high speed using bulk dynamic threshold voltage MOSFET (B-DTMOS) with advanced fast-signal-transmission shallow well

Shibata, Akira; Matsuoka, Toshimasa; Kakimoto, S.; Kotaki, Hiroshi; Nakano, M.; Adachi, K.; Ohta, Kuniichi; Hashizume, N.

doi:10.1109/vlsit.1998.689206

Cited by 16 publications

(13 citation statements)

References 2 publications

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“…8(b). Since tends to have the similar temperature coefficient as , according to (6), tends to increase with temperature mainly due to the increase of and . For an nm device operating at weaker bias condition, i.e., V; however, tends to more deeply increase with increasing temperature than .…”

Section: A Channel Noise and Equivalent Thermal Resistancementioning

confidence: 96%

“…The channel noise has a significant effect on the equivalent thermal resistance for conventioanl MOSFETs. In fact, by neglecting the body trans-conductance, for DT MOSFETs would be approximately the same as that for conventional MOS-FETs as expressed in the following: (6) where K is the reference temperature. Note that (6) indicates that in the low regime, the body-related parasitics would have little influence on .…”

Section: A Channel Noise and Equivalent Thermal Resistancementioning

confidence: 99%

“…Several optimized silicon-on-insulator (SOI)-or bulk-based DT MOS fabrication processes with improved performance have been demonstrated [5], [6], and its ability of RF applications with high cutoff frequency and maximum oscillation frequency has been reported as well [7]- [9]. However, the temperature effect on the RF characteristics of DT MOS-FETs is rarely known.…”

Section: Introductionmentioning

confidence: 99%

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Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs

Wang

Chen

et al. 2010

IEEE Trans. Microwave Theory Techn.

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In this paper, temperature-dependent RF small-signal and noise characteristics of silicon-on-insulator (SOI) dynamic threshold voltage (DT) MOSFETs are experimentally examined. In the low-voltage regime, both the cutoff and maximum oscillation frequencies ( and max ) tend to increase with temperature.In addition, the inherent body-related parasitics and the series resistance have much more impact on max than . Besides, we found that the noise stemmed from the body resistance ( ) would contribute to the output noise current, and degrade the minimum noise figure (NF min ). Our study may provide insights for RF circuit design using advanced SOI DT MOSFETs. Index Terms-Body resistance, dynamic threshold voltage (DT)MOSFETs, noise, RF, silicon-on-insulator (SOI), small signal, temperature dependence. where he is involved with RF-related technologies. His current research focuses on advanced mixed-mode and RF CMOS design including device modeling, noise characterization, power behavior, and reliability studies.

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Section: A Channel Noise and Equivalent Thermal Resistancementioning

confidence: 96%

Section: A Channel Noise and Equivalent Thermal Resistancementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs

Wang

Chen

et al. 2010

IEEE Trans. Microwave Theory Techn.

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“…Successful DTMOS based circuit implementations have been realized in silicon on insulator (SOI) processes, even though it is possible to implement DTMOS devices in bulk silicon processes. In fact in 1998, Shibata et al [48] demonstrated high speed operation at ultra low V DD using Bulk Dynamic Threshold MOSFET (B-DTMOS). The process involves manufacturing MOSFETS with shallow wells and high impurity concentration layers between low impurity concentration layers (to reduce signal transmission delay due to body resistance).…”

Section: Dynamic Threshold Mos (Dtmos)mentioning

confidence: 99%

“…The benefits of the approach are evident even over the region of ultra low V DD and low V th , where forward bias effect is weak. An experimental 61-stage ring oscillator was shown to have a delay of 182 ps per stage at a 0.3 V power supply [48]. Soeleman et al have shown that the energy delay product of DTMOS is comparable to that of subthreshold CMOS, with DTMOS offering higher speeds [49].…”

Section: Dynamic Threshold Mos (Dtmos)mentioning

confidence: 99%

Femto Joule Switching for Nano Electronics

Beiu

Nyathi

Aunet

et al. 2006

IEEE International Conference on Computer Systems and Applications, 2006.

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Advancement in silicon technology has led to miniaturization of devices, scaled power supply voltages and faster transistor switching speeds just to name a few. Along with these improvements came issues such as threshold voltage scaling, interconnect delays, sensitivity to variations, and increased power dissipation. Device miniaturization has also seen a rise of battery-operated electronic devices with very stringent energy requirements. Clearly, power dissipation is already a major design challenge in highly integrated systems. Leakage currents are becoming significant as the power supply and threshold voltages are scaled. Low power/energy techniques are thus very critical. This tutorial will review known techniques for reducing power/energy, focusing on recent results scaling the supply and the device threshold voltages and on bridging the divide between strong and weak inversion operations, as well as on using emerging nanoelectronic devices. These will show that GHz frequencies could be sustained in the (sub-)femto Joule per inverter energy range.

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Low voltage four‐quadrant analog multiplier using dynamic threshold MOS transistors

Niranjan

Gupta

2009

Microelectronics International

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Purpose -Real-time multiplication of two analog signals is one of the most important operations in analogue signal processing. Driven by low-power and low-voltage requirements for integrated mixedsignal portable applications, the paper's aim is to propose a novel four-quadrant low-voltage analog multiplier using dynamic threshold MOS transistors (DTMOS). Design/methodology/approach -The SPICE simulations were performed with 0.25 mm technology parameters and results verify the performance of the circuit. The multiplier is simulated at low-supply voltage of^0.5 V. Findings -The proposed multiplier has high linearity and simple structure hence it is suitable for high-performance and low-power analog VLSI applications. Originality/value -A new low-voltage four quadrant analog multiplier using DTMOS circuit topology is presented in the paper.

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Ultra low power supply voltage (0.3 V) operation with extreme high speed using bulk dynamic threshold voltage MOSFET (B-DTMOS) with advanced fast-signal-transmission shallow well

Cited by 16 publications

References 2 publications

Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs

Temperature-Dependent RF Small-Signal and Noise Characteristics of SOI Dynamic Threshold Voltage MOSFETs

Femto Joule Switching for Nano Electronics

Low voltage four‐quadrant analog multiplier using dynamic threshold MOS transistors

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