Use of Bilayer Gate Insulator in GaN-on-Si Vertical Trench MOSFETs: Impact on Performance and Reliability

Abstract

We propose to use a bilayer insulator (2.5 nm Al2O3 + 35 nm SiO2) as an alternative to a conventional uni-layer Al2O3 (35 nm), for improving the performance and the reliability of GaN-on-Si semi vertical trench MOSFETs. This analysis has been performed on a test vehicle structure for module development, which has a limited OFF-state performance. We demonstrate that devices with the bilayer dielectric present superior reliability characteristics than those with the uni-layer, including: (i) gate leakage two-orders of magnitude lower; (ii) 11 V higher off-state drain breakdown voltage; and (iii) 18 V higher gate-source breakdown voltage. From Weibull slope extractions, the uni-layer shows an extrinsic failure, while the bilayer presents a wear-out mechanism. Extended reliability tests investigate the degradation process, and hot-spots are identified through electroluminescence microscopy. TCAD simulations, in good agreement with measurements, reflect electric field distribution near breakdown for gate and drain stresses, demonstrating a higher electric field during positive gate stress. Furthermore, DC capability of the bilayer and unilayer insulators are found to be comparable for same bias points. Finally, comparison of trapping processes through double pulsed and Vth transient methods confirms that the Vth shifts are similar, despite the additional interface present in the bilayer devices.

Challenges and Perspectives for Vertical GaN-on-Si Trench MOS Reliability: From Leakage Current Analysis to Gate Stack Optimization

“…As expected, the gate-source and gate-drain diode leakage of the bilayer devices was found to be lower by a couple of orders of magnitude [ 46 ]. This is attributed to the intrinsically higher breakdown field of SiO 2 , as well as the additional barrier (conduction band discontinuity at the Al 2 O 3 /SiO 2 interface of 0.4 eV [ 86 ]) to thermionic leakage from the channel to the gate, introduced by the bilayer configuration.…”

“…The reliability of the gate stack is highly influenced by the choice of the oxide in trench MOSFETs, since the insulator is vulnerable to repeated stressing during the operation of the power devices over time [ 46 , 84 , 85 ]. Specifically, the properties of the insulator can greatly affect the leakage, breakdown and trapping performance of the M-O-S stack under positive gate stresses.…”

“…This section demonstrates the advantages of employing a bilayer insulator composition in quasi-vertical MOSFETs through DC and pulsed measurements, and TCAD simulations [ 46 ]. The devices under test are GaN-on-Si trench MOSFETs, structurally similar to Figure 1 .…”

“…To evaluate the reliability of the two stacks under the ON-state, forward gate breakdown step stress tests were performed, where the gate voltage was incremented from 0 V in steps of 3V, while V DS was constant at 1 V. Very little dispersion in breakdown voltage was observed across several devices, and the gate breakdown voltage for the unilayer and bilayer configurations were found to be 9 V and 27 V [ 46 ], the bilayer devices displaying an improvement of three times.…”

“…Quasi-vertical structures can build on the recent advancements into GaN-on-Si epitaxy achieved during research into lateral GaN devices, while providing better field management due to the vertical stack. Among the several available quasi-vertical configurations such as CAVETs [ 24 , 37 ], OG-FETs [ 38 , 39 ] or Fin FETs [ 22 , 40 ], the trench MOSFET [ 2 , 3 , 32 , 34 , 41 , 42 , 43 , 44 , 45 , 46 ] is a popular choice with high cell density. It is inherently a normally off device with low R on , and needs no regrowth of AlGaN/GaN channels.…”