Wideband LTE Power Amplifier with Integrated Novel Analog Pre-Distorter Linearizer for Mobile Wireless Communications

Uthirajoo, Eswaran; Ramiah, Harikrishnan; Kanesan, Jeevan; Reza, Ahmed Wasif

doi:10.1371/journal.pone.0101862

Cited by 8 publications

(3 citation statements)

References 24 publications

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“…The significant reduction in the backed-off output power level to enhance the efficiency causes the PA to fail with linearity specifications, requiring linearization techniques to curb this conflict (Cripps, 2006). In a nutshell, techniques for efficiency enhancement emphasis on improving the efficiency of a linear PA, whereas linearization techniques enhance the linearity of a highly efficient but non-linear PA (Uthirajoo et al, 2014). Several CMOS linearization techniques have been implemented such as multi-gate transistors, adaptive bias control, feedback and feedforward techniques (Katz, 2001), capacitance variation compensation, analog pre-distorter (APD) and digital predistortions (DPDs) in the effort of enhancing the linearity of the PA (Koo et al, 2012;Jin et al, 2013).…”

Section: Introductionmentioning

confidence: 99%

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

Gunasegaran

Rajendran

Mariappan

et al. 2021

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Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

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Section: Introductionmentioning

confidence: 99%

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

Gunasegaran

Rajendran

Mariappan

et al. 2021

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“…The PA is the most power hungry device, and reducing the power consumption of the PA is quite important to increase the EE of the OFDM system. By placing a digital predistorter (DPD) in front of the PA, the linear dynamic range of the PA can be increased to a certain range [4–7]. However, the DPD is an expensive device and the increment of the energy efficiency is rather limited.…”

Section: Introductionmentioning

confidence: 99%

A combination of selected mapping and clipping to increase energy efficiency of OFDM systems

2017

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We propose an energy efficient combination design for OFDM systems based on selected mapping (SLM) and clipping peak-to-average power ratio (PAPR) reduction techniques, and show the related energy efficiency (EE) performance analysis. The combination of two different PAPR reduction techniques can provide a significant benefit in increasing EE, because it can take advantages of both techniques. For the combination, we choose the clipping and SLM techniques, since the former technique is quite simple and effective, and the latter technique does not cause any signal distortion. We provide the structure and the systematic operating method, and show the various analyzes to derive the EE gain based on the combined technique. Our analysis show that the combined technique increases the EE by 69% compared to no PAPR reduction, and by 19.34% compared to only using SLM technique.

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“…Prediction techniques for OFDM systems were investigated in [8]. Whereas OFDM is an efficient modulation scheme for broadband communications [9,10], the OFDM sub-channels are assumed to be flat fading [11]. In [12], a channel predictor was proposed that consists of an envelope predictor to trace the slow envelope variation and a phase slope detector to follow the phase changes for each multipath cluster.…”

Section: Introductionmentioning

confidence: 99%

Window-Based Channel Impulse Response Prediction for Time-Varying Ultra-Wideband Channels

et al. 2016

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This work proposes channel impulse response (CIR) prediction for time-varying ultra-wideband (UWB) channels by exploiting the fast movement of channel taps within delay bins. Considering the sparsity of UWB channels, we introduce a window-based CIR (WB-CIR) to approximate the high temporal resolutions of UWB channels. A recursive least square (RLS) algorithm is adopted to predict the time evolution of the WB-CIR. For predicting the future WB-CIR tap of window wk, three RLS filter coefficients are computed from the observed WB-CIRs of the left wk−1, the current wk and the right wk+1 windows. The filter coefficient with the lowest RLS error is used to predict the future WB-CIR tap. To evaluate our proposed prediction method, UWB CIRs are collected through measurement campaigns in outdoor environments considering line-of-sight (LOS) and non-line-of-sight (NLOS) scenarios. Under similar computational complexity, our proposed method provides an improvement in prediction errors of approximately 80% for LOS and 63% for NLOS scenarios compared with a conventional method.

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Wideband LTE Power Amplifier with Integrated Novel Analog Pre-Distorter Linearizer for Mobile Wireless Communications

Cited by 8 publications

References 24 publications

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

A combination of selected mapping and clipping to increase energy efficiency of OFDM systems

Window-Based Channel Impulse Response Prediction for Time-Varying Ultra-Wideband Channels

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