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A high-precision time integrator is presented whose output is the accumulation of sequence of time inputs. A novel time adder with time-domain differential structure is proposed to avoid commonmode errors such as supply noise and leakage current. The performance under various process, voltage and temperature conditions is examined in detail. By using two time adders in parallel, a differential synchronous time integrator is proposed, which is easier to cascade with other time-mode arithmetic circuit. Implemented in 65 nm 1.2 V CMOS technology, the proposed time integrator achieves a gain of 27.97 dB with a 317 kHz 30 ps peak-to-peak sinusoidal input, and consumes 152.7 mW with 50 MHz sampling rate. The experimental results confirm the integration operation is realised properly and accurately.

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