Preseparated, semiconductive enriched carbon nanotubes hold great potential for thin-film transistors and display applications due to their high mobility, high percentage of semiconductive nanotubes, and room-temperature processing compatibility. Here in this paper, we report our progress on wafer-scale processing of separated nanotube thin-film transistors (SN-TFTs) for display applications, including key technology components such as wafer-scale assembly of high-density, uniform separated nanotube networks, high-yield fabrication of devices with superior performance, and demonstration of organic light-emitting diode (OLED) switching controlled by a SN-TFT. On the basis of separated nanotubes with 95% semiconductive nanotubes, we have achieved solution-based assembly of separated nanotube thin films on complete 3 in. Si/SiO(2) wafers, and further carried out wafer-scale fabrication to produce transistors with high yield (>98%), small sheet resistance ( approximately 25 kOmega/sq), high current density ( approximately 10 microA/microm), and superior mobility ( approximately 52 cm(2) V(-1) s(-1)). Moreover, on/off ratios of >10(4) are achieved in devices with channel length L > 20 microm. In addition, OLED control circuit has been demonstrated with the SN-TFT, and the modulation in the output light intensity exceeds 10(4). Our approach can be easily scaled to large areas and could serve as critical foundation for future nanotube-based display electronics.

We report high-performance fully transparent thin-film transistors (TTFTs) on both rigid and flexible substrates with transfer printed aligned nanotubes as the active channel and indium-tin oxide as the source, drain, and gate electrodes. Such transistors have been fabricated through low-temperature processing, which allowed device fabrication even on flexible substrates. Transparent transistors with high effective mobilities (approximately 1300 cm(2) V(-1) s(-1)) were first demonstrated on glass substrates via engineering of the source and drain contacts, and high on/off ratio (3 x 10(4)) was achieved using electrical breakdown. In addition, flexible TTFTs with good transparency were also fabricated and successfully operated under bending up to 120 degrees . All of the devices showed good transparency (approximately 80% on average). The transparent transistors were further utilized to construct a fully transparent and flexible logic inverter on a plastic substrate and also used to control commercial GaN light-emitting diodes (LEDs) with light intensity modulation of 10(3). Our results suggest that aligned nanotubes have great potential to work as building blocks for future transparent electronics.

We report a comparative study and Raman characterization of the formation of graphene on single crystal Ni (111) and polycrystalline Ni substrates using chemical vapor deposition (CVD). Preferential formation of monolayer/ bilayer graphene on the single crystal surface is attributed to its atomically smooth surface and the absence of grain boundaries. In contrast, CVD graphene formed on polycrystalline Ni leads to a higher percentage of multilayer graphene (g3 layers), which is attributed to the presence of grain boundaries in Ni that can serve as nucleation sites for multilayer growth. Micro-Raman surface mapping reveals that the area percentages of monolayer/bilayer graphene are 91.4% for the Ni (111) substrate and 72.8% for the polycrystalline Ni substrate under comparable CVD conditions. The use of single crystal substrates for graphene growth may open ways for uniform high-quality graphene over large areas. SECTION Nanoparticles and Nanostructures

Massive aligned carbon nanotubes hold great potential but also face significant integration/assembly challenges for future beyond-silicon nanoelectronics. We report a wafer-scale processing of aligned nanotube devices and integrated circuits, including progress on essential technological components such as wafer-scale synthesis of aligned nanotubes, wafer-scale transfer of nanotubes to silicon wafers, metallic nanotube removal and chemical doping, and defect-tolerant integrated nanotube circuits. We have achieved synthesis of massive aligned nanotubes on complete 4 in. quartz and sapphire substrates, which were then transferred to 4 in. Si/SiO(2) wafers. CMOS analogous fabrication was performed to yield transistors and circuits with features down to 0.5 mum, with high current density approximately 20 muA/mum and good on/off ratios. In addition, chemical doping has been used to build fully integrated complementary inverter with a gain approximately 5, and a defect-tolerant design has been employed for NAND and NOR gates. This full-wafer approach could serve as a critical foundation for future integrated nanotube circuits.

Nanotube/nanowire chemical sensors have attracted significant attention for the detection of explosives and nerve agents. We report TNT sensors based on aligned carbon nanotubes transferred onto fabric as prototype wearable sensors, with an excellent sensitivity down to 8 ppb at room temperature. In addition, we also fabricated TNT sensors based on ZnO nanowires with a detection limit of 40 ppb at room temperature. Those sensors have great potential for electronic nose systems.