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A more realistic approach to evaluate the impact of polycrystalline metal gates on the MOSFET variability is presented. 2D experimental workfunction maps of a polycrystalline TiN layer were obtained by Kelvin Probe Force Microscopy with a nanometer resolution. These data were the input of a device simulator, which allowed us to evaluate the effect of the workfunction fluctuations on MOSFET performance variability. We have demonstrated that in the modelling of TiN workfunction variability not only the different workfunctions of the grains but also the grain boundaries should be included.

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Abstract-The stacks of III-V materials, grown on the Si substrate, that are considered for fabrication of highly scaled devices tend to develop structural defects, in particular Threading Dislocations (TDs), which affect device electrical properties. We demonstrate that the characteristics of TD sites can be analyzed by utilizing the Conductive Atomic Force Microscopy (CAFM) technique with nanoscale spatial resolution within a wide temperature range. In the studied InGaAs/Si stacks, electrical conductance through TD sites was found to be governed by the Poole-Frenkel emission, while off-TDs conductivity is dominated by the Thermionic Emission process.