Ferroelectric HfZrO x (Fe-HZO) with a larger remnant polarization (P r) is achieved by using a poly-GeSn film as a channel material as compared with a poly-Ge film because of the lower thermal expansion that induces higher stress. Then two-stage interface engineering of junctionless poly-GeSn (Sn of ∼5.1%) ferroelectric thin-film transistors (Fe-TFTs) based on HZO was employed to improve the reliability characteristics. With stage I of NH3 plasma treatment on poly-GeSn and subsequent stage II of Ta2O5 interfacial layer growth, the interfacial quality between Fe-HZO and the poly-GeSn channel is greatly improved, which in turn enhances the reliability performance in terms of negligible P r degradation up to 106 cycles (±2.7 MV/1 ms) and 96% P r after a 10 year retention at 85 °C. Furthermore, to emulate the synapse plasticity of the human brain for neuromorphic computing, besides manifesting the capability of short-term plasticity, the devices also exhibit long-term plasticity with the characteristics of analog conductance (G) states of 80 levels (>6 bit), small linearity for potentiation and depression of −0.83 and 0.62, high symmetry, and moderate G max/G min of 9.6. By employing deep neural network, the neuromorphic system with poly-GeSn Fe-TFT synaptic devices achieves 91.4% pattern recognition accuracy. In addition, the learning algorithm of spike-timing-dependent plasticity based on spiking neural network is demonstrated as well. The results are promising for on-chip training, making it possible to implement neuromorphic computing by monolithic 3D ICs based on poly-GeSn Fe-TFTs.

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A simple method for preparing liquid target with uniform thickness is proposed for external PIXE analysis. The standard sample prepared by this method can help us to make quantitative analysis of the liquid samples.

Impact of SiO2 capping layer on the quality of poly-GeSn film and characteristics of bottom-gate junctionless (JL) p-channel thin films transistors (P-TFTs) were studied. From the analysis results of X-ray diffraction (XRD) and Hall-effect measurement, the amorphous GeSn film starts to crystallize at 450°C while the crystallinity enhances at 500°C by employing rapid thermal annealing (RTA) as the film crystallization process. With capping layer on the whole region, the hole concentration becomes too high to turn the JL P-TFTs off. However, by limiting capping layer on source/drain region to increase hole concentration, total series resistance is reduced due to lower sheet resistance and contact resistance, which consequently improves the drive current, ION/IOFF ratio and field-effect mobility. Based on the best process conditions and structure to form the poly-GeSn JL P-TFTs, ION/IOFF ratio up to 5.6 × 102 are achieved while peak field-effect mobility of 20.8 cm2/Vs is obtained. Moreover, the low thermal budget process of 500°C for 30 sec enables next-generation monolithic 3D-ICs.