An anomalous field-oxide-growth phenomenon in a recessed local oxidation of silicon (LOCOS) structure with a nitride spacer (R-LOCOS), in which the field oxide growth at the center of the opening area is suppressed when isolation spacing is small, is reported. The field-oxide-ungrowth (FOU) phenomenon was found to have strong structural dependence, on the aspect ratio of the opening area, active pattern density, and silicon recess depth. By changing process conditions, such as dry etching and wet cleaning conditions, however the FOU was not affected. Since the tendency of the FOU occurrence was coincident with that of the microloading effect in reactive ion etching, the FOU was believed to originate from a residue on the exposed silicon surface after the etching process. When silicon was not recessed, the FOU was not observed at any of the structural variations. From a two-dimensional simulation of field oxidation, it has been found that in a nonrecessed LOCOS structure, a residue on the silicon surface does not significantly affect field oxide growth, but in the recessed LOCOS structure, field oxide growth is very sensitive to the existence of a residue on the recessed surface. Thus, to successfully use the recessed LOCOS structure with a subquarter micron design rule avoiding the occurrence of the FOU, structural factors that include an active pattern layout should be carefully chosen.

Gate oxide degradation by transient surge current has been tested during polysilicon etching in a parallel-plate plasma-type etcher. To reduce the transient surge current, rf power is removed gradually at a rate of 50 W/s after 50% overetch. Breakdown voltage distribution measured at a metal–oxide–semiconductor capacitor array structure with gate edges is improved considerably by the ramping down of rf power. This clearly indicates that the transient surge current can cause charge damage to some extent even in a plasma-type etcher. Gate oxide recovery during the interpolyoxide deposition is also discussed.

The effect of fluorocarbon polymer buildup on oxide etching was investigated by monitoring the reactor chamber under an 0,/Ar plasma. Its effect on contact etching was also investigated by employing a CF4/CHF,/Ar plasma. It was determined that the 0,/Ar plasma was very useful for confirming polymer buildup on the inner chamber surface. This is because of an increased oxide etch rate by fluorine radicals, formed by the dissociation of the fluorocarbon polymer.Meanwhile, contact etching in a CF4/CHF,/Ar plasma with a high CHF4/CF4 ratio caused a reduction in etch rate near the edge of the wafer (in some cases even an etch stop), a considerable loss of critical dimension, and higher etch selectivity to polysilicon. These various etch behaviors are attributed to the polymer buildup on the inner surface of the chamber.CF4/O, plasma after the contact etching. On the other hand, the resist etch rate in the chamber was a little lower than that in the TLR chamber, seemingly due to the role of carbon as a scavenger of oxygen radicals in the fluorocarbon polymer. This implies that the oxygen selectivity to the resist can be increased greatly by the polymer buildup.An investigation of the effects of process parameters on the oxide etch rate in the 0,/Ar plasma confirmed that the increased oxide etch rate in the oxide chamber was primarily due to the polymer buildup. Figure 2 shows a significant increase in the etch rate with the RF power in the oxide chamber and its relatively low value of 2 nm/mm in the TLR chamber. When changing the gas mixture from 20 sccm 0, and 5 sccm Ar to 25 sccm Ar, the etch rate in the oxide chamber decreased from 72 to 10 nm/mm. This means that adding oxygen is effective for removing the polymer built on the inner chamber surface. This also sug-

One of the crucial factors to take mostly into account the development and production of l3Onm node in low ki DRAM process is the lens aberration sensitivity control of optical lithographic tools. To meet the required specification these impact of lens aberration resulting from reducing process window caused by pattern deformation, CD uniformity, CD asymmetry, and pattern shift etc. should be understood and considered. In this study, we mainly focused on the aberration sensitivity control for the DRAM isolation layer that is very sensitive to odd components such as coma and three-foil etc. There are a few methods to do this, but the application of extreme sigma setting that is the powerful manner to improvement of asymmetric pattern and layout rotation were examined. It was confirmed that the simulated image and real patterning results for left-right CD difference came from aberrated lens are well matched. In addition, why is the extreme sigma setting more effective than standard settings was investigated with analysis of diffraction patterns on pupil filling ofprojection lens optics combined with Zernike coefficients phase map.

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