The present contribution summarizes the activities performed towards the realization of a Single-Chip Front-End (SCFE) operating in C Band, integrating the High Power, Low Noise amplification and switching functionalities to be provided in modern T/R modules' Front-Ends for space SAR applications. The technologies adopted in this project are provided by United Monolithic Semiconductors (UMS) and Selex Electronic Systems (SLX), the GH25-10 0.25 µm gate length and the GaN technology featured by 0.5 µm gate length for UMS and SLX respectively. At the completion of the design phase two SCFEs have been designed in the two technologies, each in two slightly different versions, featured by state-of-the-art performance. In particular, in Tx-mode, both are featured by approximately 40 W power output, with 36 dB large-signal gain and 38 % / 27 % PAE for UMS and SLX versions respectively, while in Rx-mode 2.5 dB noise figure resulted, with robust operation. The two dies are featured by 6.9 × 5.4 mm2 and 7.28 × 5.40 mm2 for UMS and SLX versions respectively
In this contribution, the analysis on high frequency Class E design approach is presented. Starting from the classical theory, a numerical analysis is performed to extend class E feasibility at higher frequencies. The design of hybrid Class-E amplifier in LDMOS technology for UMTS base-station applications will be presented, in order to validate the theoretical results. The simulated PA reaches an output power of 40.7dBm in correspondence of 56% drain efficiency.
In this paper, the design of a single-chip RF PulseWidth Modulator and Driver (PWMD) aimed at exciting a 80 W class-E GaN high-power stage at 435 MHz is described. For the required buffer size, avoiding potential ringing of the pulses within the buffer structure presents a major challenge in the design process. Therefore, a smaller chip capable of driving capacitive loads of up to 5 pF was initially designed, fabricated and tested. An approach based on 3D EM simulations was used to validate the test results. Based on the presented results, an enlarged chip able to drive a 80 W GaN high-power stage is currently being designed.
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