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A four-mask low-temperature poly-Si (LTPS) TFT process for pand n-channel devices has been developed. PECVD-deposited amorphous silicon was recrystallized to polycrystalline-silicon with single-area excimer-laser crystallization, while the gate dielectric was fabricated by PECVD deposition of a SiH 4 -N 2 O-based silicon oxide. Formation of drain and source was carried out with selfaligned ion-beam implantation. To prove the potential capability of these devices, which are suitable for conventional and inverted OLEDs alike, several functional active-matrix backplanes implementing different pixel circuits have been produced. This active-matrix backplane process has been customized to drive small molecules as well as polymers regardless if its structure is top or bottom emitting.

This paper demonstrates that sputtered Ti-Cu is a superior barrier and seed layer on glass and organic panel substrates, over traditional electroless seeding, for the fabrication of ultrafine copper traces (2-5µm) on dry film polymer dielectrics for high-density 2.5D interposers. The current semi-additive processes using electroless Cu seed face several challenges in scaling the copper trace widths below 5µm due to two main reasons: high-roughness of dielectric and high-thickness of copper seed. In this paper, both the above limitations are addressed by an advanced Physical Vapor Deposition (PVD) process that can be scaled to large panels with high throughputs. The PVD process developed in this study is capable of depositing Ti-Cu barrier and seed layer on 500 mm size panels at a low enough temperature for dry film polymer dielectrics of glass transition temperatures (Tg) of 150-160°C. The superiority of sputtered Ti-Cu over the conventional electroless Cu seeding for achieving good and reliable adhesion between Cu and dry film polymer dielectrics was investigated by peel strength measurements after highly-accelerated stress tests (HAST). The results indicate that sputtered process results in higher peel strengths and without adhesive failures at the TiCu-polymer interfaces. Adhesive failures, however, were observed with the traditional electroless seed processes. In addition, the PVD processes resulted in small 2-5µm Cu traces on smooth dielectric films like ZS-100, requiring no desmear treatment. Such a process promises to be scalable to large panels leading to low-cost fabrication of high-density 2.5D interposers.

Advanced static DC magnetron sputtering methods based on the magnet wobbling technique were investigated to achieve highly uniform and homogeneous metallization layers. The novel split sputter mode (SSM) method, wherein the deposition process is divided into two distinct steps, enables the AKT rotary cathode technology to provide excellent layer properties, while keeping a high production throughput. The effectiveness of the SSM technique was demonstrated through copper-coated large-area substrates.

Cost efficient PMOS, NMOS and CMOS LTPS processes have been developed. The practical viability of these processes was demonstrated by building logic circuits as well as entire AMLCD and AMOLED display systems including integration of the various display effects, module fabrication and driver electronics design.SID 07 DIGEST • 69 ISSN/007-0966X/07/3801-0069-$1.00 © 2007 SID