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This paper reports a 320 GHz low-jitter and low-reference-spur signal source consisting of an 80 GHz integer-N phase-locked loop (PLL) and a 320 GHz frequency quadrupler. The 80 GHz PLL features a novel dual-path quadrature exclusive-OR (QXOR) technique to cancel the spurs at the reference frequency and its harmonics, enabling low-spur and low-noise phase locking. The proposed PD also enables frequency detection and lock detection, rendering the band-searching to be decoupled from the loop components. Implemented in a 0.13-μm SiGe BiCMOS technology, the proposed signal source shows a −73.1 dBc reference spur, -113.7 dB/Hz phase noise at 1-MHz offset at 40.96 GHz, and -90.3 dB/Hz phase noise at 1-MHz offset at 311.8 GHz. It achieves an integrated jitter of 66.9 fsrms at 40.96 GHz, and 122 fsrms (both integrated from 10 k to 100 MHz) beyond 300 GHz, with a total division ratio of 512. The lock detection time is at the microsecond level. The maximum output power is -3.24 dBm, and the power consumption is 372 mW.

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We developed a numerical model to investigate continuous wave four wave mixing (FWM) in silicon nano-waveguides with embedded PIN junctions. The model is complemented by fitting to the experimental data. Using the model we show that the FWM gain in silicon can compensate for all relevant loss mechanisms (two photon and free carrier absorption as well as linear loss) provided that the carrier lifetime is low enough (few tens of picoseconds).