Virtual networks (VNs) provide methods that simplify resource management, deal with connectivity constraints, and support legacy applications in distributed systems, by enabling global addressability of VN-connected machines through either a common layer 2 Ethernet or a NAT-free layer 3 IP network. This paper presents a novel VN design that supports dynamic, seamless addition of new resources with emphasis on scalability in a unified private IP address space. Key features of this system are: (1) Scalable connectivity via a P2P overlay with the ability to bypass overlay routing in LAN communications, (2) support for static and dynamic address allocation in conjunction with virtual nameservers through a distributed data store, and (3) support for transparent migration of IP endpoints across widearea networks.The approach is validated by a prototype implementation which has been deployed in grid and cloud environments. We present both a quantitative and qualitative discussion of our findings.

Due to the rising importance of virtualization, extensive efforts have gone into determining and improving the performance of workloads on virtualized platforms. This has resulted in a series of modifications to the leading architecture used in virtualized systems (x86) by adding hardware support for virtualization, the latest of which is the addition of tags and tag comparators to the x86 TLB. In this context, it is necessary to have a thorough understanding of the TLB behavior of virtualized workloads and understand the change in this behavior with TLB related architectural parameters. One way of obtaining this understanding is by conducting a simulation-based study of the interaction of various microarchitectural parameters and their effect on the TLB behavior. However, the lack of suitable simulation frameworks makes such a study daunting.In this paper, we present a full-system simulation framework which is suitable for conducting such studies. We first motivate the need for TLB modeling in virtualized systems. Then, we present the framework, develop and validate a timing model for the TLB and evaluate the simulation speed when this model is used. Using the timing model, the influence of the TLB on workload performance is examined for a variety of single and multi-domain workloads and compared with equivalent non-virtualized workloads. It is found that the performance of virtualized workloads, in terms of instructions per cycle (IPC), can vary by 1% to 35% due to the TLB and that this IPC variation can be as much as 9 times the variation in nonvirtualized workloads.

Virtualization is a convenient way to efficiently utilize the numerous on-chip resources in modern physical platforms. However, it is important to ensure a high performance for the workloads running on such virtualized platforms. One factor which reduces the performance of these virtualized workloads is the frequent flushing of hardware-managed Translation Lookaside Buffers (TLBs). To avoid these flushes and reduce the TLB miss rate, we propose the Tag Manager Table (TMT), a hardware architecture for generating and managing process-specific TLB tags. Since the TMT approach is software-transparent, it is equally applicable for virtualized and non-virtualized environments. Using a full-system simulation approach, we investigate the reduction in the TLB miss rate achieved by using the TMT. We also analyze the variation of this reduction with factors like the size of the TMT, the TLB architecture and the workload characteristics and estimate the relative importance of these factors in determining this reduction.

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