In this paper, the impact of Si surface roughness on metal oxide semiconductor field effect transistor (MOSFET) characteristics with ultrathin hafnium oxynitride (HfON) gate insulator formed by electron cyclotron resonance (ECR) sputtering was investigated. The surface roughness of Si substrate was reduced by Ar/4.9%H 2 annealing utilizing conventional rapid thermal annealing (RTA) system. The obtained root-mean-square (RMS) roughness was 0.08 nm (as-cleaned: 0.21 nm). The HfON was formed by 2 nm-thick HfN deposition followed by the Ar/O 2 plasma oxidation. The electrical properties of HfON gate insulator were improved by the reduction of Si surface roughness. It was found that the current drivability of fabricated nMOSFETs was remarkably increased by reduction of Si surface roughness.

A report is presented on a Al/HfN/p-Si(100) n-MISFET with excellent electrical properties that inserts a 4 nm-thick HfN gate dielectric with equivalent oxide thickness of 0.7 nm formed by electron-cyclotronresonance plasma sputtering. The threshold voltage (V th ) of the device was 0.05 V. The on/off ratio and subthreshold swing at W/L = 90 µm/ 5 µm were ∼10 3 and 200 mV/dec., respectively. In particular, the n-MISFET exhibits I DS,sat = 20.2 µA/μm and g m = 20.5 mS/mm. This is the first report of n-MISFET characteristics with HfN gate dielectric.

Abstract:We investigated nitrogen-rich HfN insulator on p-Si(100) substrate to prevent to form an interface layer with low dielectric constant by electron-cyclotron-resonance plasma sputtering method for the first time. The nitrogen concentration in the deposited HfN film was confirmed as approximately Hf:N = 1:1.2. Furthermore, the electrical properties of Al/HfN/p-Si(100) gate stack were improved by hydrogen anneal compared to nitrogen (N 2 ) anneal. The EOT of 0.64 nm with low leakage current of 6.2 × 10 −4 A/cm 2 (@ V FB -1 V) was obtained. The results suggest that the effect of hydrogen anneal attributed to improve the electrical properties of HfN gate dielectric. Keywords: hafnium nitride, hydrogen anneal, ECR plasma sputtering Classification: Electron devices, circuits, and systems References[1] M. Gutowski, J. E. Jaffe, C. L. Liu, M. Stoker, R. I. Hegde, R. S. Rai, and P. J. Tobin, "Thermodynamic stability of high-k dielectric metal oxides ZrO 2 and HfO 2 in contact with Si and SiO 2 ," Appl. Phys. Lett., vol. 80, no. 11, pp. 1897Lett., vol. 80, no. 11, pp. -1899Lett., vol. 80, no. 11, pp. , 2002

Metal-ferroelectric-insulator-semiconductor structure capacitors with a polyvinylidene fluoride trifluoroethylene (75/25) (PVDF-TrFE) ferroelectric and a lanthanum zirconium oxide ( LaZrO x) insulator layers were fabricated on a p-type Si(100) substrate in this work. The thin films were prepared using the spin-coating method. The LaZrO x thin films were crystallized at 750°C for 30 min in an O 2 ambient. Negligible hysteresis was observed from the C–V (capacitance-voltage) characteristic of the LaZrO x/ Si structure. The equivalent oxide thickness (EOT) was about 8.2 nm. Then the PVDF-TrFE film was spin-coated on the LaZrO x/ Si structure. To crystallize the PVDF-TrFE, the structure was annealed at 165°C for 30 min. The memory window width in the C–V curve of the Au/PVDF - TrFE/LaZrO x/ Si structure was about 4 V for a voltage sweep of ±5 V, and the leakage current density was about 10-8 A/cm 2 at 35 kV/cm for a 100-nm-thick film.

In this study, we fabricated the n-channel metal-ferroelectric-insulator-semiconductor field effect transistors (MFIS-FETs) using an Au/polyvinylidene fluoride-trifluoroethylene P(VDF-TrFE)/ZrO 2 /Si(100) structures. The ZrO 2 thin film had the equivalent oxide thickness (EOT) value of around 9 nm. And the P(VDF-TrFE) film on a ZrO 2 /Si structure showed good ferroelectric property with memory window width of 2.5 V for a bias voltage sweeping of «7 V. The leakage current density of this MFIS structure showed very excellent insulation property with about 9 © 10 ¹8 A/cm 2 at 5 V. Based on these results, we fabricated and investigated MFIS-FETs with ferroelectric polymer P(VDF-TrFE) film and ZrO 2 buffer layer. The memory window width and on/off ratio of the MFIS-FET was about 4.5 V and 10 3 , respectively. These results predicted that the P(VDF-TrFE) thin film would be useful for the realization of 1-transistor type ferroelectric memory.