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This paper presents an overview of the macro design, architecture, and built-in self-test (BIST) implementation as part of the IBM thirdgeneration embedded dynamic random-access memory (DRAM) for the IBM Blue Logic ® 0.11-m application-specific integrated circuit (ASIC) design system (CU-11). Issues associated with embedding DRAM in an ASIC design are identified and addressed, including fundamental DRAM core function, user interface, test, and diagnosis. Macro operation and organization are detailed and contrasted with traditional DRAM designs. The use of BIST, a key enabler for embedded DRAM, is discussed while highlighting innovations required by the embedded DRAM. the advent of embedded DRAM offerings in a logic-based ASIC technology [3], the performance of embedded DRAM macros has improved significantly over that of DRAM-based technologies. Users are increasingly replacing SRAM implementations with embedded DRAM,

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The term management implies the achievement of objectives through effective use of resources. Management style relates to the various approaches used in pursuit of those same objectives. There can be various management tools contributing to an effective management solution. In this article we will be discussing one such tool.This management tool reflects an approach to communication systems management in which the management functions are physically separatedfrom the host computers driving a communications network. These management functions are packaged on a small IBM processor base (i.e., sidestream processor) and designed for use in a centralized network management center environment. The management functions included in this sidestream processor tool relate to problem management. change management. project scheduling and tracking. network control. and network configuration.