The implementation of what we believe to be the first stored-program digital optical computer is described. The implementation domain consists of lithium niobate directional couplers that are modified to provide optical control and are interconnected with single-mode fiber. The architecture is also the first to employ time-of-flight synchronization. That is, there are no flip-flops used as synchronizing memory elements. Synchronization is achieved by the precise timing of the arrival of information at all points of interaction. The design is a minimal one, employing only 62 directional couplers. Previous papers have discussed the primary architecture and synchronization conditions for the machine. Here we focus on the secondary architecture, construction, debugging, and performance of the machine.
We describe the design and implementation of a packetswitched fiber optic interconnect prototype with a ShuffleNet topology, intended for use in shared-memory multiprocessors. Coupled with existing latency-hiding mechanisms, it can reduce latency to remote memory locations. Nodes use deflection routing to resolve contention. Each node contains a processor, memory, photonic switch, and packet routing processor. Payload remains in optical form from source to final destination. Each host processor is a commercial workstt ion with FIFO interfaces between its bus and the photonic switch. A global clock is distributed optically to each node to minimize skew. Component coats and network performance figures are presented for various node configurations including bit-per-wavelength and fiber-parallel packet formats. Our efforts to implement and test a practical interconnect including real host computers distinguishes our work from previous theoretical and experiment al work. We summarize obstacles we encountered and discuss future work.
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