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This paper reports the development of the canid filarial worm, Dipetalonema dracunculoides, in the brown dog tick, Rhipicephalus sanguineus by determining whether development is similar within larval, nymphal and adult stages of infected ticks. This study demonstrates that only infected nymphal ticks can support the complete development of the filarial worm. Infected larval ticks are not suitable intermediate hosts, nor are infected adults. Development depends on some stage-specific property of the vector, and the maturation to the infective stage is stimulated during the course of the nymphal-adult moult.

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This paper describes the design of mixed-signal back end for an ultrahigh-frequency sensor-enabled radio-frequency identification transponder in full compliance with the Electronic Product Code Class-1 Generation-2 protocol, defined in the standard ISO 18000-6C. The chip, implemented in a low-cost 0.35-µm CMOS technology process, includes a baseband processor, an analog-to-digital converter (ADC) to digitize the signal acquired from the external sensor, and some auxiliary circuitry for voltage regulation and reference generation. The proposed solution uses two different supply voltages, one for the processor and the other for the mixed-signal circuitry, and defines a novel communication protocol between both blocks so that analog readouts are minimally affected by the digital activity of the tag. The whole system was first functionally validated by exhaustively testing with external dc power supplies ten prototype samples, and then, the two main blocks, processor, and ADC were individually tested to assess their performance limits. Regarding the baseband processor, experiments were performed toward the calculation of its packet error rate (PER) under two typical biasing configurations of passive tags, using either crude clamps or regulators. It was found that the regulated biasing outperforms the clamping solution and obtains a PER of 3 × 10 −3 with a supply voltage of 0.75 V. The current consumption of the processor during the reception and response to a Read command at maximum backward rate is only 2.2 µA from a 0.9-V supply. Regarding the ADC, it is a 10-b successive approximation register converter which obtains 9.41 b of effective resolution at 2-kS/s sampling frequency with a power consumption of 250 nW, including the dissipation of a current generation cell and the clock generation circuitry, from 1-V supply.