Double patterning technology (DPT) is a promising technique that bridges the anticipated technology gap from the use of 193nm immersion to EUV for the half-pitch device node beyond 45nm. The intended mask pattern is formed by two independent patterning steps. Using DPT, there is no optical imaging correlation between the two separate patterning steps except for the impact from mask overlay. In each of the single exposure step, we can relax the dense design pattern pitches by decomposing them into two half-dense ones. This allows a higher k 1 imaging factor for each patterning step. With combined patterns, we can achieve overall k 1 factor that exceeds the conventional Rayleigh resolution limit. This paper addresses DPT application challenges with respect to both mask error factor (MEF) and 2D patterning. In our simulations using DPT with relaxed feature pitch for each exposure step, the MEF for the line/space is fairly manageable for 32nm half-pitch and below. The real challenge for the 32nm half-pitch and below with DPT is how to deal with the printing of small 2D features resulting from the many cutting sites due to feature decomposition. Each split of a dense pattern generates two difficult-to-print line-end type features with dimension less than one-fifth or onesixth of ArF wavelength. Worse, the proximity environment of the 2D cut features can then become quite complex. How to stitch them correctly back to the original target requires careful attention. Applying target bias can improve the printing performance in general. But using a model-based stitching error correction method seems to be a preferred solution.

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Extending ArF lithography to the 45nm node at a lower k 1 puts a heavy demand on resolution enhancement techniques (RETs), exposure tools, and lithography friendly design. Hyper numerical aperture (NA) exposure tools, immersion [1], and double exposure techniques (DETs) are promising methods to extend lithography manufacturing to the 45nm node at k 1 factors around 0.3. Double dipole lithography (DDL) is becoming a popular RET candidate for foundries and memory makers to pattern the poly gate active layer [2, 3, 4]. Double exposure method or double pattern technique (DPT), [5,6,7] using ternary 6% attenuated PSM (attPSM) is a good imaging solution that can reach and likely go beyond the 45nm node. In this work, back end of the line (BEOL) metal like test structures were used for developing a model-based dark field DDL method. We share our findings of using DDL for patterning 45nm node trench structures with binary intensity mask (BIM) on a dry high NA ArF scanner.

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