We have proposed a top-down design methodology for RSFQ logic circuits using a binary decision diagram (BDD). The BDD is a way to represent a logical function by a directed graph, which consists of binary switches having one input and two outputs. The important features of the BDD RSFQ logic circuits are a small number of primitives, dual rail and non-clocked logic style, and a small gate count, We have constructed a cell library for the BDD RSFQ logic design, which is composed of five square basic cells. Any logic function can be constructed by simply connecting the library cells. CAD tools for the logic level simulation, the circuit simulation and a layout view extraction have been developed to carry out the top-down RSFQ logic design on the Cadence CAD environment. A design flow of the RSFQ full adder is demonstrated to show the potential of the top-down design methodology for the design of large-scale RSFQ integrated circuits.

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We propose a cell-based design approach for rapid single flux quantum (RSFQ) circuits based on a binary decision diagram (BDD). The BDD is a way to represent a logical function using a directed graph which consists of binary switches having one input and two outputs. Since complex logic circuits can be implemented in the form of regular arrays of the BDD binary switches, we can use a cell-based layout methodology for the design of the RSFQ circuits. In this study, we implemented the BDD binary switches by a D2 flip-flop. In the BDD design approach we made a cell library which contains a binary switch, pulse splitters, confluence buffers and Josephson transmission lines. All cell layouts in the library have identical widths and heights, so that any logic function can be laid out by simple connection of the library cells. As a case study, we implemented a 1-bit RSFQ half-adder and a 3-bit encoder for a flash AD converter.

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