Alpha, neutron, and heavy-ion single-event measurements were performed on both high-performance and hardened flip-flop designs in a 28-nm bulk CMOS technology. The experimental results agree very well with simulation predictions and confirm that event error rates can be reduced dramatically using effective layout design.Index Terms-Dual-interlocked cell (DICE), Layout design through Error Aware Positioning (LEAP), radhard design methodology, radiation hardening, radiation hardening by design, single-event effect, single-event upsets (SEU), soft error.

No abstract

No abstract

No abstract

No abstract