The effect of thermal nitridation on impurity diffusion and Oxidation Induced Stacking Fault (OSF) size in Si are clarified by selective nitridation. Enhanced Band P diffusion, retarded Sb diffusion, and growth of OSP's are found in Si masked with Si0 2 films. Retarded Band P diffusion, enhanced Sb diffusion and rapid OSF shrinkage are found in nonmasked Si that has undergone NH3 heat treatment. On the other hand, in N2 or N2 + H2 (1:3) ambients, no significant ambient effect on impurity diffusion is found in Si masked with Si0 2 films. However, retarded Band P diffusion and enhanced Sb diffusion are found in nonmasked Si with N2 ambient. The results are shown to be consistent with the model that shows that interstitials and vacancies effect thermal equilibrium.

A new method of performing a creep test on silicon single crystals is described. The experiment utilizes silicon wafers. The stress applied to the wafers is provided by a Si3N4 film deposited by chemical vapor deposition on the front side of the wafer. The samples, i.e., silicon wafers with superposed Si3N4 films, are annealed in a quartz tube at 1000–1100 °C. The creep curves obtained are classified into two types according to stress. One type is related to plastic deformation of the wafer; the other is an elastic deformation. These results are available for the use of Si3N4 film in semiconductor technology.

A flying-spot scanner that employs a chopped photon beam emitted from a cathode ray tube is reported. The photon beam scanns a planar p-n junction put on a metal electrode through a In2O3-coated transparent electrode and a 15 µm-thick mylar spacer. The ac photovoltage is picked up with electrodes through a condensor formed by the spacer. The photovoltage signal modulates brightness of another cathode ray tube to form a scanning image. Mean wavelength and chopping frequency of the photon beam are 507 nm and 2 kHz. Scanning image analysis is done using photocurrent density equations based on a step-like junction model. Three kinds of junctions, a solar cell, a partly-deep junction and a non-uniformly ion implanted one, have been evaluated to show the validity of the present method.

A new technique using auxiliary silicon wafers lapped with Al2O3 powder has been developed for Sb diffusion into silicon. Diffusion wafers are set face to face with those wafers in an open‐tube system with Sb2O3 as the dopant source. This technique can easily attain a carrier concentration as high as the solid solubility of Sb in silicon without surface defects such as surface erosion. Carrier concentration is controlled by changing the distance between the diffusion and auxiliary wafers. In addition, it is confirmed that higher diffused areas on the diffusion wafers correspond to the lapped areas of the auxiliary wafers.

The relation between the force acting on SijN4 film edges and dislocation generation in silicon substrates under the SisN4 film edge is investigated. Samples with 3 • 3 mm square patterns of SijN4 are annealed at 600~176 for 2 hr in N2 atmosphere. The force acting on the film edge is evaluated from the fringe patterns observed in x-ray section topographs. Dislocations generated at the film edge are observed using Secco etching. As a result, it is proved that temperature dependence of a critical force, Sc (N/m), acting on the SijN4 film edge in dislocation generation is represented by Sc = 10.5 exp (Q/kT), where Q is 0.25 eV. Similar procedures are carried out for samples with SisN4-SiO~ films. A thin SiO2 film inserted between the SisN4 film and silicon substrate prevents the formation of dislocations in samples annealed at high temperatures. This suppression effect for dislocation generation is interpreted in terms of the viscoelastic behavior of SiO2 films at high temperatures.In silicon device technology, chemical vapor deposited (CVD) Si3N4 films on silicon substrates have Key words: stress, mechanical property, x-ray section topography.been widely used as selective oxidation masks. It is well known that SigN4 films on silicon substrates have a tensile stress of about 109 N/m2 at room tern- perature (1-3). The origin of this stress is not ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 141.210.2.78 Downloaded on 2015-05-30 to IP * Electrochemical Society Student Member. * * Electrochemical Society Active Member. Key words: poiycrystaUine silicon, low pressure chemical vapor deposition, phosphorus, ion implantation. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 141.210.2.78 Downloaded on 2015-05-30 to IP