This article describes time distribution in a White Rabbit Network. We start by presenting a short overview of the White Rabbit project explaining its requirements to highlight the importance of the timing aspects of the system. We then introduce the technologies used to achieve high clock accuracy, stability and resilience in all the components of the network. In particular, the choice of the IEEE 1588-2008 (PTP) and Synchronous Ethernet standards are explained. In order to accommodate hardwaresupported mechanisms to increase PTP synchronization accuracy, we introduce the White Rabbit extension to PTP (WRPTP). The hardware used to support WRPTP is presented. Measured results of WRPTP performance demonstrate sub-nanosecond accuracy over a 5km fiber optic link with a precision below 10ps and a reduced PTP-message exchange rate. Tests of the implementation show full compatibility with existing PTP gear.

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This paper investigates the ultimate limits of White Rabbit (WR), an high-accuracy time distribution system based on field-programmable gate array (FPGA). The knowledge of such limits is essential for new emerging applications that are evaluating WR. In this paper, we identify and study the key elements in the WR synchronization: the digital dual mixer time difference phase detector and the Gigabit Ethernet transceiver. The benchmarks and experimental analysis of these key elements allow us to determine the WR switch (WRS) performance limits and evaluate their evolution with newer FPGAs. The identified performance limits are achievable by the present-day generation of WRS. The ultimate limits of short-term synchronization performance due to FPGA implementation have been derived through analysis and then demonstrated using the existing WRS enhanced with an additional daughterboard. This combination (WRS and daughterboard) achieves a tenfold improvement in terms of phase noise, jitter, and short-term stability with respect to the current WR performance. Both phase detectors and Gigabit transceivers have a similar phase noise contribution equal to a short-term stability of modified Allan deviation 4E-13 at $\tau = 1$ s (dominated by flicker phase modulation noise).

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CERN's accelerator control group has embraced "Open Hardware" (OH) to facilitate peer review, avoid vendor lock-in and make support tasks scalable. A web-based tool for easing collaborative work was set up and the CERN OH Licence was created. New ADC, TDC, fine delay and carrier cards based on VITA and PCI-SIG standards were designed and drivers for Linux were written. Often industry was paid for developments, while quality and documentation was controlled by CERN. An innovative timing network was also developed with the OH paradigm. Industry now sells and supports these designs that find their way into new fields.