To fabricate a metal oxide semiconductor field-effect transistor (MOSFET) with a three-dimensional (3D) structure, several problems arise in the conventional thermal oxidation (TO) process, such as leakage current, shape nonuniformity, stress concentration, and the dependence of the oxidation rate on the lattice plane of Si. To overcome these problems, we propose low-temperature (<300 C) neutral beam oxidation (NBO) as an alternative oxidation process. We found that an oxide film grown by NBO (NBO film) exhibits performance characteristics of a gate dielectric film that are as high as those of thermal oxide films in terms of the relationship between equivalent oxide thickness (EOT) and leakage current. The rate of NBO is also independent of the lattice plane of Si, while the oxidation is beam orientation dependent. Therefore, growing oxide films by NBO is advantageous, in that the method can be applied to gate dielectric films for the 3D fin structure of field-effect transistors (FinFETs) and surrounding gate transistors (SGTs).

Three-terminal fin field-effect transistors (3T-FinFETs) were fabricated by neutral-beam oxidation (NBO) to form gate silicon dioxide (SiO2). The 3T-FinFET fabricated by NBO showed higher device performance – namely, a higher subthreshold slope and a higher effective mobility – than that fabricated by conventional thermal oxidation. It is considered that those improved subthreshold slope and mobility are due to the fact that the three-dimensional structure of a SiO2 film fabricated by NBO has a lower interfacial state density and a lower roughness than a similar structure fabricated by the conventional thermal oxidation of a SiO2 film. The reasons for the lower interfacial state density and lower roughness are the low temperature and lattice plane independence of NBO in comparison with conventional thermal oxidation processes.

We report the room-temperature observation of clear size effects in photoluminescence of ensembles of SiGe/Si double-quantum-well nanocolumns. A silicon thin layer (100 nm) containing two 3-nm-thick Si 0:8 Ge 0:2 layers was etched into an ensemble of 100 nm tall nanocolumns standing vertically on the 200-nm-thick silicon-on-insulator layer. A clear shift of photoluminescence peak positions appearing at around 1.8 eV has been observed with varying average diameter of the nanocolumns between 18 and 24 nm.

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