A packaging process for flip-chip LEDs (light emitting diodes) is described. The LEDs are picked and placed on a silicon substrate wafer. After reflow the substrates are individualized. AuSn solder is used for the interconnection. The solder compounds, Au and Sn, are electroplated separately: Sn on the silicon substrate and Au on the chip. The interconnections formed by tin-rich and by gold-rich intermetallic phases are compared. The metallurgy and the reliability of the LEDs are investigated. The superiority of the gold-rich interconnection is demonstrated.
A low-temperature bonding process of 30-µm-pitch Au–Sn microbumps was developed in ambient air by the surface activated bonding (SAB) method. The surface activated process, such as Ar plasma pretreatment, is essential for Au–Sn low-temperature bonding. With a total of 4908 connections, the bond yield reaches 100% at a bonding temperature of 100–200 °C in ambient air. No electrical short circuit occurs between two adjacent bumps under the optimized bonding pressure. The bonding strength is larger than 10 MPa. Scanning electron microscope (SEM) and electron probe micro analyzer (EPMA) observations of the cross-sectional bonded interfaces were performed. Intermetallic compounds (IMCs) of AuSn, AuSn2, and AuSn4 appear around the bonded interfaces in the bonding at 100 and 150 °C. More one phase, a thin Au5Sn layer, was detected in the bonding at 200 °C. The bonding feasibility of Au–Sn flip-chip microbumps is confirmed at 100–200 °C in ambient air.
We investigate the potential of large optical cavity (LOC)-laser structures for AlGaInP high-power lasers. For that we study large series of broad area lasers with varying waveguide widths to obtain statistically relevant data. We study in detail I/sub th/, /spl alpha//sub i/, /spl eta//sub i/, and P/sub max/, and analyze above-threshold behavior including temperature stability and leakage current. We got as expected for LOC structures minimal /spl alpha//sub i//spl les/1 cm/sup -1/ resulting in /spl eta//sup d/=1.1 W/A for 64/spl times/2000 /spl mu/m/sup 2/ uncoated devices. We obtain total output powers /spl ges/3.2 W (qCW) and /spl ges/1.5 W (CW) at 20/spl deg/C
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