Two-dimensional materials have garnered interest from the perspectives of physics, materials, and applied electronics owing to their outstanding physical and chemical properties. Advances in exfoliation and synthesis technologies have enabled preparation and electrical characterization of various atomically thin films of semiconductor transition metal dichalcogenides (TMDs). Their two-dimensional structures and electromagnetic spectra coupled to bandgaps in the visible region indicate their suitability for digital electronics and optoelectronics. To further expand the potential applications of these two-dimensional semiconductor materials, technologies capable of precisely controlling the electrical properties of the material are essential. Doping has been traditionally used to effectively change the electrical and electronic properties of materials through relatively simple processes. To change the electrical properties, substances that can donate or remove electrons are added. Doping of atomically thin two-dimensional semiconductor materials is similar to that used for silicon but has a slightly different mechanism. Three main methods with different characteristics and slightly different principles are generally used. This review presents an overview of various advanced doping techniques based on the substitutional, chemical, and charge transfer molecular doping strategies of graphene and TMDs, which are the representative 2D semiconductor materials.

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This work showcases the physical insights of a core-shell dual-gate (CSDG) nanowire transistor as an artificial synaptic device with short/long-term potentiation and long-term depression (LTD) operation. Short-term potentiation (STP) is a temporary potentiation of a neural network, and it can be transformed into long-term potentiation (LTP) through repetitive stimulus. In this work, floating body effects and charge trapping are utilized to show the transition from STP to LTP while de-trapping the holes from the nitride layer shows the LTD operation. Furthermore, linearity and symmetry in conductance are achieved through optimal device design and biases. In a system-level simulation, with CSDG nanowire transistor a recognition accuracy of up to 92.28% is obtained in the Modified National Institute of Standards and Technology (MNIST) pattern recognition task. Complementary metal-oxide-semiconductor (CMOS) compatibility and high recognition accuracy makes the CSDG nanowire transistor a promising candidate for the implementation of neuromorphic hardware.

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