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Needs for the Chip Scale Package (CSP) is acceleratingly increased in the package market, where low cost, light weight, smaller, and thinner package is required. The increasing signal performance and number of functions of a signal processing system also require higher pin count and higher wiring density. To satisfy these needs, we have developed a high thermal coefficient of expansion (TCE) ceramic material, HITCE. This material enables a fine and flexible design of a package for high performance, and high reliability.We have investigated the most appropriate assembly design of the HITCE CSP, by finite element method (FEM) analyses, considering a creep characteristics of solder. According to the analyses, we confirmed that the inelastic strain of solder bump is considerably reduced by a HITCE material of low Young's modulus and high TCE. Especially by the HITCE, we found that the inelastic strain of solder for Land Grid Array (LGA) becomes smaller than the inelastic strain of a Ball Grid Array (BGA) solder bump, which is essential for higher reliability of the second level mounting. HITCE ceramic is expected to be the most appropriate material to keep the heigh of solder joint low for a thinner CSP.To confirm the analytical results, we prepared a BGA-type CSP and a LGA-type CSP, and carried out temperature cycling tests (TCT). The result has shown that the first level reliability of HITCE CSP satisfies JEDEC level 1 requirement. Moreover, the second level reliability results revealed that LGA-type CSP has higher solder joint reliability than that of BGA-type CSP.The LGA-type HITCE CSP can be mounted on a printed wiring board (PWB) simply with a printed solder paste, with no ball attaching process. Low cost and low height assembly, and high wiring density for a LGA-type CSP is available by adopting the HITCE materials. IntroductionNeeds for the CSP is rapidly increasing in the IC package market, where low cost, light weight, smaller, and thinner package are required. The increasing signal performance and number of function of a signal processing system also require higher pin count and higher wiring density.For the CSP, fine pitch BGA-type mountings are becoming the mainstream in these days. However, increase in number of I10 counts and the decrease in package size are two major trends for the coming higher density packaging, and down sizing of the pad-pitch is almost unavoidable.The BGA-type CSP rely on solid solder balls for the interconnection between the package and a PWB. This ball attaching process inevitably causes a substantially higher cost than the relatively simple lead-frame package. One of the main disadvantages of the solder balls is their poor thermal

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A series of new single-step methods and their corresponding algorithms with automatic step size adjustment for model equations of fiber Raman amplifiers are proposed and compared in this paper. On the basis of the Newton-Raphson method, multiple shooting algorithms for the two-point boundary value problems involved in solving Raman amplifier propagation equations are constructed. A verified example shows that, compared with the traditional Runge-Kutta methods, the proposed methods can increase the accuracy by more than two orders of magnitude under the same conditions. The simulations for Raman amplifier propagation equations demonstrate that our methods can increase the computing speed by more than 5 times, extend the step size significantly, and improve the stability in comparison with the Dormand-Prince method. The numerical results show that the combination of the multiple shooting algorithms and the proposed methods has the capacity to rapidly and effectively solve the model equations of multipump Raman amplifiers under various conditions such as co-, counter-and bi-directionally pumped schemes, as well as dual-order pumped schemes.