Problem statement: The development cost for Application Specific Integrated Circuits
(ASICs) are high, algorithms should be verified and optimized before implementation. The Digital
Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication.
The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA)
devices. Approach: This research presented the comparative study of Spartan-3AN, Virtex-4 and
Virtex-5 FPGA devices. The implementation of standard and truncated multipliers is done using Very
high speed integrated circuit Hardware Description Language (VHDL). Results: Remarkable
reduction in FPGA resources, delay and power was achieved using truncated multipliers instead of
standard parallel multipliers when the full precision of the standard multiplier is not required. The three
devices showed significant improvement for truncated multipliers as compared to standard multipliers.
Results showed that the anomaly in Spartan-3AN average connection and maximum pin delay have been
efficiently reduced in Virtex-4 and Virtex-5 devices. Conclusion: The Virtex-5 FPGA device showed
better performance as compared to Spartan-3AN and Virtex-4 FPGA devices
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