We have produced epitaxial Si1−x−yGexCy/Si heterostructures by rapid thermal chemical vapor deposition using methylsilane SiCH6). These layers were grown in the SiH4/GeH4/SiCH6/H2 system between 550 and 600 °C at 1.5 Torr. Suitable process conditions were found that allow very efficient substitutional carbon incorporation. No carbon cross contamination was observed. Crystal quality, chemical composition, and lattice strain were deduced from Nomarski microscopy, transmission electron microscopy, Fourier transform infrared spectroscopy, secondary ion mass spectrometry, and x-ray diffraction. Defect-free alloy layers with compositions of up to 20 at.% Ge and 2.2 at. % C were produced. The lattice parameter was tailored so that the strain in these layers gradually moved from compressive to tensile. A tensile strain of up to 0.35% was achieved.
We have grown dilute Si-C epitaxial layers on Si (100) substrates at 800°C with a RTCVD process using SiH4 and C3H8. C atoms can be kinetically stabilized in interstitial sites in the Si lattice at relatively high temperatures if process parameters, such as growth rate and C/Si flux ratio, are optimized.
We optimized thin reoxidized nitrided SiO2 (ROXNOX) films produced by RTP on the basis of a careful analysis of the requirements of EEPROMs. The influence of oxidation, nitridation, and reoxidation parameters on charge-trapping and breakdown during a constant current stress was studied in detail. We show that a very light nitridation gives a maximum nitrogen concentration at the Si/SiO2 interface and the largest increase in the endurance of the films under a high-field stress. The physical basis of these results is discussed. The improvement was confirmed on complete I kbit memory arrays produced with a 3 ~tm CMOS process with self-aligned contacts. Their lifetime was increased by at ]east an order of magnitude, up to more than 10~ Highly reliable thin dielectric films are needed for advanced integrated circuits, in particular, for electrically erasable and programmable read-only memories (EEPROMs). In addition to EEPROMs as stand-alone large-capacity devices, there is a need for such memories embedded in a wide variety of application-specific integrated circuits (ASICs).As the thickness of dielectric layers is reduced in highly scaled technologies, it becomes difficult to control the endurance of EEPROMs, i.e., the maximum number of cycles they can be programmed before failure. The width of the memory window, i.e., the difference in threshold voltages
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