This paper discusses SiC JTE design tradeoffs required to maximize device performance while minimizing consumed die area, fabrication cost and maintaining good reliability. Modeling and experimental results are provided.

MeV level aluminum implants into 4H-SiC were performed as part of superjunction diode fabrication. Measurement of resistance test structures produced resistivities well above expected values with large decreases at elevated temperatures. Capacitance-voltage measurements indicate a high activation rate of the implanted aluminum. Temperature dependent Hall measurements produce reasonable hole mobilities with acceptor ionization energies of approximately 330meV, well above the 200meV expected for low concentration aluminum doping in 4H-SiC.

In this paper, we show state of the art, low on-resistance, 25mW/1.2kV and 43mW/2.5kV SiC MOSFETs with excellent design robustness and process control such that the parametric spread of key device characteristics are approaching Si products. The impact of starting material variability on device performance is shown and design sensitivity curves are presented.