This paper presents a HSPICE macromodel of a phase change memory (PCM) cell. The model simulates not only the resistance change by phase (as corresponding to the two states, amorphous and crystalline), but also the temperature profile, the crystalline fraction during the programming and the drift behavior in resistance and threshold voltage. The proposed macromodel (consisting of two models) generates the I-V and R-I plots of a PCM cell at a very small error compared with experimental data. The electrical-based modeling by HSPICE allows to fully characterize the holding voltage and the continuous behavior of the PCM resistance, while assessing the impact of the programming time. Furthermore, the proposed model takes into account the drift behavior of few parameters when the PCM is not been programmed or read, making the model more realistic. Selection of the parameters is based on operational features, so the electrical characterization of the PCM is simple, easy to simulate and intuitive.

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This paper presents a HSPICE macromodel of a phase change memory (PCM) by considering the phenomenon of drift behavior as leading to incorrect operation. The model simulates the behavior due to the drift in the resistance and threshold voltage when the cell is not been read or programmed. It considers not only the resistance change by phase (as corresponding to the two phases, amorphous and crystalline), but also the temperature, the crystalline fraction and the continuous profile of the resistance. This electrical based modeling by HSPICE allows to fully characterizing the holding voltage and the continuous behavior of the PCM resistance, while assessing the impact of the programming time of the drifted parameters. The proposed macromodel generates the I-V and R-I plots of a PCM cell at a very small error compared with experimental data. A detailed sensitivity analysis of the electrical parameters of the PCM cell is pursued to show the robust characteristics of the proposed macromodel to capture the variation in parameters due to drift. *

This paper presents a Ternary Content Addressable Memory (TCAM) cell that employs memristors as storage element. The TCAM cell requires two memristors in series to perform the traditional memory operations (read and write) as well as the search and matching operations for TCAM; this memory cell is analyzed with respect to different features (such as transistor sizing and voltage threshold) of the memristors to process fast and efficiently the ternary data. A comprehensive simulation based assessment of this cell is pursued by HSPICE.