A memristor-based TCAM (ternary content addressable memory) cell

Junsangsri, Pilin; Lombardi, Fabrizio

doi:10.1145/2206781.2206857

Cited by 31 publications

(9 citation statements)

References 10 publications

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“…The designs differed in the numbers of memristors and transistors employed to constitute the bit‐cell memory in the CAM array. Different bit‐cell arrangements of possible Re‐TCAM structures with SRAM 8T‐2M (8‐Transistors 2‐memristors), 24 SRAM‐6T‐2M, 25 SRAM‐5T‐2M, 26 Re‐CAM‐5T‐2M, 27 and Re‐CAM‐2T‐2M 28 were introduced. The 2T2M bit‐cell design is perceived as the densest and efficient circuit topology, primarily for Re‐TCAM.…”

Section: Introductionmentioning

confidence: 99%

“…In particular design density of these devices is low compared with SRAM while they are power‐hungry devices. In order to overcome these issues, Re‐TCAM designs have been presented in Junsangsri et al 25 and Eshraghian et al 27 In these papers, authors used memristors to replace SRAM to store the information. These designs can reduce power consumption by up to 95% 27 .…”

Section: Introductionmentioning

confidence: 99%

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Variability analysis of resistive ternary content addressable memories

Bahloul

Fouda

Barraj

et al. 2020

Circuit Theory & Apps

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Resistive ternary content addressable memories (Re-TCAMs) are considered a potential platform for in-memory associative processing. Re-TCAM permits the store and process of the data in the same physical area, allowing inmemory computing. Given the unique properties of the non-volatile memristive device, Re-TCAM is capable of low search energy, large-scale storage, and massively parallel processing. However, like any other semiconductor, memristor as a nanodevice suffers from fabrication process imperfections that provoke a significant variance in their high (R H) and low (R L) resistance states. These variations might lead to the malfunction of the Re-TCAM array and affect its performance and reliability. This paper proposes a simplified mathematical formulation of the memristor state variability for 2T2M bit-cell-based Re-TCAM array. We present a comprehensive statistical design, considering different circuit parameters and variance effects, such as tolerance of memristance variation, the memristor ratio (α = R H =R L), transistor technology, and memory width. The impact of these parameters on the performance is formulated as the probability of error is extensively studied, and a closed-form expression for the optimal threshold voltage is derived. The utility of the presented investigation is illustrated using a design example with real device parameters.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Variability analysis of resistive ternary content addressable memories

Bahloul

Fouda

Barraj

et al. 2020

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

“…In particular design density of these devices is lean compared with SRAM, while they are power hungry devices. To address those issues, memristor based TCAM designs have been presented in [4] and [1]. In those paper, the authors used memristors to replace SRAM to store the information.…”

Section: B Ternary Content Addressable Memorymentioning

confidence: 99%

“…The designs varied in the numbers of both memristors and transistors used to build the bit-cell memory. Various cell configurations of possible MTCAM structures with SRAM 8T-2M (8-Transistors 2-memristors) [3], SRAM-6T-2M [4], SRAM-5T-2M [5], Re-CAM-5T-2M [1] and Re-CAM-2T-2M [6] were presented. The 2T2M bit-cell design is considered as the most concise and efficient structure.…”

Section: Introductionmentioning

confidence: 99%

Hardware emulation of Memristor based Ternary Content Addressable Memory

Bahloul

Naous

Masmoudi

2017

2017 14th International Multi-Conference on Systems, Signals &Amp; Devices (SSD)

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“…Also, [13] describes a multi-level ReRAM architecture where every crossbar column represents a single memory cell, being able to deliver higher or lower storage density depending on the needs of the application. Hybrid memristor-transistor ternary content addressable memories were also investigated in [25]. Nonetheless, such approaches eventually limit significantly the memory density and/or the overall performance with complex read/write algorithms.…”

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confidence: 99%

High-Radix Arithmetic-Logic Unit (ALU) Based on Memristors

Vourkas

Sirakoulis

2015

Emergence, Complexity and Computation

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It is well-known that faster arithmetic operations could be achieved via high-radix numeric systems [1]. However, due to the absence of appropriate storage devices, such a practice was not given much attention so far because it would require memory capacity doubling in order to represent high-radix numbers in binary mode. Moreover, in view of the prospected end of the so called "Moore's law", many new approaches, which aim to extend the applicability of Complementary Metal-Oxide-Semiconductor (CMOS)-based circuits and systems, have been proposed by the semiconductor industry. In fact, Flash memory is approaching fundamental scaling limits due to several reliability issues. Therefore, currently there is a growing interest in new devices for information processing and memory, as well as new technologies and paradigms for system architecture [2][3][4][5][6][7][8][9]. An exciting approach would be the development of a competitive, reliable, multi-level storage cell technology, which will enable storing multiple bits of information in a single memory element [10,11]. Most such approaches so far are based on transistors [2], but the recent discovery of the memristor has renewed the interest for this promising scientific area [12][13][14]. Owing to their analog nature, memristors have a remarkable ability to store multi-bit values in a single cell [15,16]; a property which adds significantly to their potential use in future multi-level storage cell technologies and high-radix arithmetic units [17].Nowadays, there is a notable variety of systems that exhibit memristive behavior [18]. As it was also mentioned in the previous chapters, memristors offer several advantages, such as nonvolatility, rapid switching, low power consumption, and compatibility with conventional CMOS technology. Additionally, they provide an unconventional computation framework, which combines information processing and storage in the memory cell itself; the major distinction from the present computing paradigms [19,20]. Such favorable performance characteristics render them a candidate technology, able to bring the next technological revolution in electronics,

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A memristor-based TCAM (ternary content addressable memory) cell

Cited by 31 publications

References 10 publications

Variability analysis of resistive ternary content addressable memories

Variability analysis of resistive ternary content addressable memories

Hardware emulation of Memristor based Ternary Content Addressable Memory

High-Radix Arithmetic-Logic Unit (ALU) Based on Memristors

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