Methods of improving aluminum alloy step coverage, such as high temperature and low power processing, have become well known (1-4). Unfortunately, these methods nearly always have drawbacks such as throughput. The process, therefore, needs to be optimized on a case by case basis. An example is provided in this paper for the case of 0.95 micron contacts (1.20 aspect ratio) starting with double level Ai-0.5% Cu-1.0% Si with TIN birrier under first lcJ mct.l nd pure Ti under second level metal; 30% step coverage deemed acceptable.Another drawback to standard high temperature Al alloy deposition is the problem of random metal voids (5). Methods to alleviate this problem are also discussed. Thus there are 2 distinct types of step coverage issues that must be considered seperately:1) Inherent step coverage 2) Random voids. Optimization of each needs to be performed independently. Fig. 1 shows the unacceptable metal step coverage, 9%, when older style deposition conditions are applied to 0.95 micron contacts. Deposition conditions were at 350 C, 7.0 mtorr, and 6.0 Kw deposition power in a Varian 3290. Fig. 2 shows the very good step coverage, 40%, obtainable at 400 C and 2.4 Kw deposition power with rounding of the contact wall by a 30 minute 875 C furnace anneal prior to metal depositon. The problem is that throughput is 2.5 times slower than at 6.0 Kw and 400C pushes the limits of the deposition machine. A compromise is needed. Fig. 3 shows improvement to 22% with rounding of the contact wall by a 10 sec treatment at 1000 C in an AG 2146 Rapid Thermal Processor (RTP)). In some cases furnace rounding may be preferable to RTP rounding. Figure 4 shows results from a 850 C 30 mm furnace rounding. This results in a retrograde contact with unacceptable step coverage. Increasing the temperature to 875 C still at 30 mm results in acceptable rounding, as shown in Fig 5. Step coverageis 20%, equivalent to RTP rounding, but still not good enough. 90 EXPERIMENTAL STEP COVERAGE OPTIMIZATION

This work investigates the functional form of the electromigration early~failure distribution in thin AI-l % Si metal films. In a very-large-scale experiment with 28 320 packaged samples, an early-failure group was identified and found to correspond to a log~normal distribution, but with a larger dispersion than that which was typical of the primary, or wear-out, distribution. The total distribution for the failures is approximately bimodal, with the more disperse background distribution dominating at early times. Scanning electron micrographs were obtained to characterize the typical failure mode, which had the same appearance for both groups. Evidence for a test-condition stress-level effect on the form of the accelerated lifetime distribution is also presented.

We report an increase in conductivity of As-implanted layers achieved by rapid thermal activation of As at temperatures below that of junction anneal (900~ N2, furnace, performed prior to RTA). This effect is interpreted in terms of residual inactive As reacting with vacancies generated during the heat-treatment. We report an increase in the metal to p+ contact resistance observed as a result of overheating complementary metal oxide semiconductor wafers in the process of TiN formation in a rapid thermal reactor. Changes in the metal to p+ contact resistance with the actual wafer temperature (estimated from the observed deviation of n § layer conductivity from the nominal values) allows for an estimate of B diffusivity in TiSi2.

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