In 2001, IBM delivered to the marketplace a high-performance UNIX ® -class eServer based on a four-chip multichip module (MCM) code named Regatta. This MCM supports four POWER4 chips, each with 170 million transistors, which utilize the IBM advanced copper back-end interconnect technology. Each chip is attached to the MCM through 7018 flip-chip solder connections. The MCM, fabricated using the IBM high-performance glass-ceramic technology, features 1.7 million internal copper vias and high-density topsurface contact pad arrays with 100-m pads on 200-m centers. Interconnections between chips on the MCM and interconnections to the board for power distribution and MCM-to-MCM communication are provided by 190 meters of co-sintered copper wiring. Additionally, the 5100 off-module connections on the bottom side of the MCM are fabricated at a 1-mm pitch and connected to the board through the use of a novel land grid array technology, thus enabling a compact 85-mm ؋ 85-mm module footprint that enables 8-to 32-way systems with processors operating at 1.1 GHz or 1.3 GHz. The MCM also incorporates advanced thermal solutions that enable 156 W of cooling per chip. This paper presents a detailed overview of the fabrication, assembly, testing, and reliability qualification of this advanced MCM technology.

This paper presents a method for extracting current excitations, which a microprocessor (UP) can present to its power distribution system (PDS) as a function of frequency. The method uses a clock modulation technique to measure the impedance seen by the UP.

Server system design is strongly influenced by power delivery aspects. Multiple requirements and limitations must be taken into consideration. This requires an appropriate DC analysis workflow. This contribution outlines a DC strategy used for IBM eServer design. The strategy is divided into two parts, PrePD and PostPD. PrePD type of analysis is used for system high-level design and optimization including parts selection, number of board layers, module sizing and placement on board, interface pin pattern optimization for both module to board and board to backplane. PostPD analysis is used for first level packaging design optimization and verification. The combination of PrePD and PostPD analysis serves as an efficient and useful tool, shown by the examples of various applications, for server power delivery system design.

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