The objective of this study is to develop a via post-strip cleaning process which would utilize non-hydroxylamine (HDA) based solvent, thereby reducing possibility of corrosion in the via and also reducing the cost of chemicals and waste disposal expenses. The work resulted in the development of a 100% solvent-less process which matches the performance of HDA-based solvents but totally eliminates chemical costs and waste-disposal expenses; removes the hazards of working with hot hazardous solvents; avoids corrosion which is common with HDA-based solvents; and thereby facilitates more efficient utilization of costly clean-room space. The new ash process in combination with a post-ash DI water rinse has been demonstrated to be effective at removing polymer inside vias and achieving via resistances comparable to standard oxygen ash + HDA wet solvent stripping.

Detailed investigations and process characterizations were performed to identify and resolve the source for programmed cell charge loss and data retention capability within the EPROM cells of our 0.35 pm Non-Volatile Memory process technology. Both front and hackend processing steps influenced the data retention behavior, with the most significant impact arising fiom the use of a high density plasma(HDP) oxide as the inter-metal dielectric. We postulate that cumulative charge buildup during processing lead to the severe charge retention effects observed and near zero yield at wafer probe.

No abstract

Electrical bitmapping and physical failure analysis were used to detect a small silicide break within a memory circuit which led to severe yield loss on our 0.20 p i CMOS process. A parallel, two-phase approach was used to optinzize the titanium silicide formation process and the silicon suYface preparation prior to titanium silicide. Several process and mask tooling modifications were implemented as a result of these efforts, which led to added robustness of the silicide process module and dramatic increases in wafer probe yield.

No abstract