This work measures the thermal conductivities along free-standing silicon layers doped with boron and phosphorus at concentrations ranging from 1ϫ10 17 to 3ϫ10 19 cm Ϫ3 at temperatures between 15 and 300 K. The impurity concentrations are measured using secondary ion mass spectroscopy ͑SIMS͒ and the thermal conductivity data are interpreted using phonon transport theory accounting for scattering on impurities, free electrons, and the layer boundaries. Phonon-boundary scattering in the 3-m-thick layers reduces the thermal conductivity of the layers at low temperatures regardless of the level of impurity concentration. The present data suggest that unintentional impurities may have strongly reduced the conductivities reported previously for bulk samples, for which impurity concentrations were determined from the electrical resistivity rather than from SIMS data. This work illustrates the combined effects of phonon interactions with impurities, free electrons, and material interfaces, which can be particularly important in semiconductor devices.

Careful sample preparation and secondary ion mass spectroscopy have been used to characterize arsenic dose loss to the silicon–oxide interface. Using high resolution x-ray photoelectron spectroscopy for microprofiling, we have directly observed the pileup of arsenic at the silicon dioxide–silicon interface. At least half of the pileup is shown to be on the silicon side of the interface in the first monolayer of silicon. Monolayer chemical oxidation and etching are successfully used to profile this pileup in silicon. This pileup contains most of the arsenic dose loss that occurs during transient enhanced diffusion. This result is crucial to correctly model the dose loss and provides physical justification for using a trap/detrap model at the interface, which is necessary to account for the fact that the arsenic surface concentration remains constant during an anneal and the fact that the dose loss is partially reversible. Finally, we have found that normal etching of the oxide in dilute hydroflouric acid and subsequent rinsing in water and exposure to air causes a permanent loss in arsenic dose.

This paper presents a detailed study of the impact of lateral doping abruptness in the source/drain extension region and the gate-extension overlap length on device performance. Proper choice of the metric used to compare the different device designs is essential. Series resistance and threshold voltage roll-offs are shown to be incomplete measures of device performance that could lead to inconsistent lateral abruptness requirements. While series resistance is seen to improve with increasing junction abruptness, threshold voltage roll-off could be degraded by both lateral junctions that are too gradual and too abrupt-in contrast to the conventional scaling assumptions. The on (supernominal)-o (subnominal) plot, which takes into account statistical variations of gate length, is proposed as a good metric for comparing different device technology designs. Gate-extension overlap length is shown to interact with lateral doping abruptness and to have a significant impact on device performance.

The role of fluorine in suppressing boron diffusion was investigated by utilizing a buried dopant marker to monitor the interaction of fluorine with interstitials. A boron spike with a peak concentration of 1.2×1018 cm−3 followed by 500 nm of undoped silicon was grown in a low pressure chemical vapor deposition furnace. The wafers were then preamorphized and implanted with either B, B and F, BF2, As, As and F, or F, respectively. Following the implants, the samples were rapid thermal annealed (RTA) at 1050 °C for very short times (spike). The use of preamorphization allows the chemical effect of fluorine to be analyzed independently of implant damage, and the buried layer functions as an indicator of point defect (in this case Si self-interstitial) perturbation. As expected, secondary ion mass spectroscopy shows that the presence of fluorine retards the diffusion of boron. In addition, the retained fluorine dose after the RTA is highest in the boron-implanted samples. In all samples the buried layer has diffused by the same amount, indicating that there is no change to the silicon self-interstitial population due to fluorine. These results suggest that fluorine has a chemical effect, and retards boron diffusion by mainly bonding with boron.

Series resistance in the source/drain region is becoming a bottleneck for MOS device performance. A rigorous, simulation-based method for calculating resistance components that correctly accounts for current spreading is presented. Resistance calculation strategies used to project lateral abruptness requirements for future scaling, based on partitioning the device into vertical strips, are shown to cause substantial errors when current spreading occurs. This can result in an overestimate of the benefits of abrupt junctions. The physical resistances obtained from simulated devices are compared with the extracted resistances from the shift-and-ratio method. Discrepancies can be explained based on violation of the basic assumptions of the shift-and-ratio method: that series resistance is bias independent and the channel resistance is directly proportional to the channel length. A new extraction method that relaxes these assumptions is presented and used to provide deeper understanding in the application of the shift-and-ratio method to deep submicron devices.