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A polysilicon roughening process is developed to reduce the interface impedance of microelectrodes of neural chips. In developing micromachined neural interface systems, one of the basic requirements is to reduce the interface impedance of microelectrodes, because the neuronal signals generally have a very small amplitude and the increased impedance can cause the charge transfer capability of microelectrodes to decrease. The developed process involves forming metal microelectrodes on top of a low pressure chemical vapor deposition (LPCVD) polysilicon film, which is deposited on top of a heavy-phosphorous-content phosphosilicate glass film. The phosphorous inhibits LPCVD polysilicon nucleation and results in very large grains, and hence, very rough film surfaces. This process significantly increases the effective surface area, and the interface impedance can be significantly reduced without increasing the physical size of microelectrodes. By using this process, the interface impedance is significantly lowered. The impedances of conventional gold microelectrodes and the microelectrodes developed in this paper are measured and compared by using a scanning electron microscope, an atomic force microscopy and an impedance spectroscopy system. Experimental results show approximately 50 times lower interface impedance for the developed method.

A new fabrication method for a three-dimensional (3D), single-crystal silicon micro-probe structure is developed. A probe card structure requires tips that are at least 50 µm tall on cantilevers thick enough to withstand a few mN of force as well as 50 µm of tip bending. The cantilever structure also must be able to move at least 50 µm of vertical motion, requiring a large sacrificial gap. The developed 3D fabrication method is based on the surface/bulk micromachining technology, which can fabricate released, high aspect ratio, single-crystal silicon microstructures with high yield using (111) silicon.

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