Periodontal infections are noncommunicable chronic inflammatory diseases of multifactorial origin that can induce destruction of both soft and hard tissues of the periodontium. The standard remedial modalities for periodontal regeneration include nonsurgical followed by surgical therapy with the adjunctive use of various biomaterials to achieve restoration of the lost tissues. Lately, there has been substantial development in the field of biomaterial, which includes the sole or combined use of osseous grafts, barrier membranes, growth factors and autogenic substitutes to achieve tissue and bone regeneration. Of these, bone replacement grafts have been widely explored for their osteogenic potential with varied outcomes. Osseous grafts are derived from either human, bovine or synthetic sources. Though the biologic response from autogenic biomaterials may be better, the use of bone replacement synthetic substitutes could be practical for clinical practice. This comprehensive review focuses initially on bone graft replacement substitutes, namely ceramic-based (calcium phosphate derivatives, bioactive glass) and autologous platelet concentrates, which assist in alveolar bone regeneration. Further literature compilations emphasize the innovations of biomaterials used as bone substitutes, barrier membranes and complex scaffold fabrication techniques that can mimic the histologically vital tissues required for the regeneration of periodontal apparatus.

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Motion estimation (ME) has a vital role in video coding and several video processing applications, such as denoising, de-interlacing, and frame rate up-conversion (FRUC) or frame interpolation. ME is employed to exploit the temporal correlation between video frames either to reduce the temporal redundancy for video coding applications or to improve the visual video quality for video processing applications. One might argue that some of these video processing applications may potentially utilize the existing motion vectors (MVs) from the decoder via MV postprocessing to keep the complexity low; however, this may not usually be a feasible option. This infeasibility could be due to either difficulty of using MVs or lack of available MVs. As video coding and video processing applications are often implemented separate intellectual properties (IPs) in hardware[12], it may be very difficult to share the MVs between decoder and other video processing applications due to bandwidth, latency, storage, and design specification reasons. Besides, some of these video processing applications may be employed either before the encoding or after the decoding, and some of them may be employed at both places; if it is employed before the encoding then MVs are not available, as a result ME needs to be performed. For example, FRUC is employed only at the display side after the decoder; de-interlacing and de-noising, however, can be utilized in both places. Where as in true motion estimation the mainly it goes to detect the motion object as closely as possible by using the block matching algorithm, and then after the estimation of the true motion vector fields it helps to produce the motion compensated temporal frame interpolation. This methods is gives the more video quality and the smoothness with the flow of frames. The main aim of this paper is to determine the motion (moving) object in the video sequences this method is called as true motion estimation by adopting the implicit and explicit smoothness constraint on block matching algorithm. After finding true motion vector also called as coherent motion vector field is used to produce the good temporal interpolated frames between existing frames this gives good video with easily flowing one after the other by smoothly and continuously. After getting the interpolated frames the performance metrics like PSNR (peak signal to noise ratio) and SSIM (structural similarity) between the interpolated frames and the original frames.

The advanced microprocessors are widely used for most of the complex systems. A silicon chip of fingernail-size may exhibit entire high performance guaranteed processor, higher cache memory and logic needed for interfacing with external devices. Reduced Instruction Set Computing (RISC) is a CPU (Central Processing Unit) design mechanism based on the vision in which exhibits basic instruction set and yields better performance after comparison with microprocessor architecture and it has the capacity to perform the instructions through microprocessor cycles per instruction. In this paper, the Cost-effective and efficient RISC Processor is designed. The RISC Processor design includes Fetching, decoding, Data and instruction memory, and Execution units. The Execution unit contains ALU (Arthematic and Logical Unit) Operations. The RISC Processor design is synthesized and implemented using Xilinx ISE Tool and simulated using Modelsim6.5f. The implementation is done by Artix-7 FPGA device and the physically debugging of the RISC Processor, and ALU Units are verified using Chipscope pro tool. The performance results are analyzed in terms of the Area (Slices, LUT's), Timing period, and Maximum operating frequency. The comparison of the RISC Processor is made concerning previous similar architecture with improvements.